• Sr . Static Timing

    Amazon (Portland, OR)
    …Edge that is powering the latest generation of Echo devices is looking for a Sr . SOC Physical Design Engineer to continue to innovate on behalf of our customers. We ... Crosstalk Delay and Crosstalk Noise analysis for digital ASIC/SoCs. - Full chip timing constraints development, full chip / Sub-System STA and Signoff for a complex,… more
    Amazon (12/20/24)
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