- Qualcomm (San Diego, CA)
- …digital transformation to help create a smarter, connected future for all. As a DFT Engineer you will work with chip architects, chip designers, implementation ... engineers and test engineers to verify the DFT and DFD (Design for Debug) architecture, implementation, and...using Verilog or VHDL + Experience with ASIC test, DFT , and debug + 5+ years of practical experience… more
- Qualcomm (San Diego, CA)
- …who will be responsible for the implementation and verification of advanced DFT /DFD (Design for Test/Design for Debug) techniques for low power, multi voltage ... designs. The successful candidate will help in the deployment of DFT methodologies that reduce test cost, increase product quality, and enhance yield learning on… more
- General Atomics (Poway, CA)
- …initial release engineering drawings and revision changes for manufacturing readiness (DFM, DFT , DFQ, et al), coordinate with design engineering and others to ... initial release engineering drawings and revision changes for manufacturing readiness (DFM, DFT , DFQ, et al), coordinate with design engineering and others to… more
- Leidos (San Diego, CA)
- …Center (LInC) at Leidos currently has an opening for a Senior level System Engineer to support a portfolio of programs in our San Diego office developing ... architectures such as system-on-chip (SoC). As a Sr. System Engineer you will work closely with the Chief ...+ Familiarity with SoC design flow to include RTL, DFT , PD, Verification + Experience developing test plans, ,… more
- General Atomics (Poway, CA)
- …We have a unique and exciting opportunity for an experienced RF Sensor Systems engineer to work in the GA-ASI Agile Mission System (AMS) division on a family ... Manifold, Doppler, Pulse Doppler, Waveform, Interferometry, Phase Shift, CFAR, DFT , Multi-Static, DSP, Digital Signal Processing **Salary:** $128,130 - $229,358… more
- Amazon (San Diego, CA)
- …communities around the world. Come work at Amazon! We're hiring a Sr. Modem Engineer within a high performance ASIC design team. This team is using industry leading ... constructed using UVM, System C and DPI-C. . Ensure that the block meets DFT , timing and power targets by working closely with the implementation team. . Learn… more
- Qualcomm (San Diego, CA)
- …positions in our SOC and core design team. As a physical design engineer you will innovate, develop, and implement chips and cores using state-of-the-art tools ... responsibilities in this role involves good understanding of functional and test ( DFT ) mode constraints for place and route, floorplanning, power planning, IR drop… more
- General Atomics (Poway, CA)
- …46832 **Job Qualifications:** + Desired Skills: Apply Lean/Continuous Improvement methodologies ( DFT , Value Stream Mapping, Six Sigma, etc.) + Requires active ... enrollment and currently attending as an undergraduate student at a recognized college or university. + Applicants who will have completed their undergraduate degree by the time the internship program would begin, must be planning to continue in a graduate… more
- Amazon (San Diego, CA)
- …integrate 3rd party IP blocks . Understand low power design & the impact of DFT on the blocks . Perform initial synthesis & timing analysis . Assist verification ... team in unit verification including test plan development . Assist with debug and bring-up About the team Basic Qualifications . Bachelor's degree in Electrical / Communications Engineering or related field, or equivalent experience . 7+ years of experience in… more
- Qualcomm (San Diego, CA)
- …RTL design, verification, synthesis, timing/STA, UPF, CLP, LEC formal verification, DFT , physical design.) + Hands-on experience in writing scripts for automation ... and data analysis. (Shell, Perl, Tcl, Python, etc.) + Knowledge and experience in data analysis and data science a plus but not required. (Pandas, Numpy, etc.) + Bachelor's degree in Electrical Engineering, Computer Science, Computer Engineering, or related… more
- Amazon (San Diego, CA)
- …synthesis flow for various technology nodes. * Work with the ASIC design and DFT teams to understand the design and create timing constraints. * Check the RTL ... design for clean synthesis run, perform STA and LEC on netlist. * Work with RFIC teams to make sure the top level integration of analog blocks are done properly and correct by construction, including formal connectivity checks. * Work with P&R teams to ensure… more
- Qualcomm (San Diego, CA)
- …Modems and to the latest best in class DDR. As a Qualcomm ASIC Engineer , you will plan, define, model, design, optimize, verify, validate, Analyze, and document IP ... is highly floorplan driven. Also, as a Physical Architect engineer you will design architectures which can be implemented...include analysis, review, and improvement of functional and test ( DFT ) mode constraints for synthesis and place and route… more