- Qualcomm (San Diego, CA)
- …SoC Implementation Team is looking for skilled engineers to focus on timing constraints development, power analysis, STA , and timing closure for ... This is an excellent opportunity to join the Snapdragon implementation team, which is responsible for SoCs in sub-3nm...and low-power multi-voltage domain crossings, and signoff with static timing analysis. + Collaborate closely with RTL design… more
- Qualcomm (San Diego, CA)
- …static timing analysis ( STA ) for complex digital designs. - Collaborate with design , verification and PD teams to ensure timing closure and design ... STA scripts and methodologies. - Analyze and resolve timing issues, working closely with cross-functional teams. - Run...power checks and Logic equivalency checks. - Participate in design reviews and provide feedback on timing … more
- Amazon (San Diego, CA)
- …to understand the design and create timing constraints. * Check the RTL design for clean synthesis run, perform STA and LEC on netlist. * Work with RFIC ... equivalent experience. * 7+ years of experience in ASIC implementation , ie, synthesis, STA and working with...Communications Engineering. * 10+ years of experience in ASIC implementation . * Experience in leading physical design .… more
- Qualcomm (San Diego, CA)
- …Aware Conformal Logic Equilalency Check: both RTL 2 Gate and Gate 2 Gate. + Run STA on final netlist and support PD timing /congestion closure + Work with RTL ... As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and...RTL designers on managing complex power intent + Manage timing constraints + Trouble shoot upf issues in synthesis… more
- Qualcomm (San Diego, CA)
- …SoC implementation team is seeking talented engineers to work on synthesis, timing constraints, formal verification, power analysis, STA and CLP for premium ... chips. This is a great opportunity to join Snapdragon implementation team responsible for SoCs in sub-3nm nodes in...power. + Generate, review and validate clock domain crossing, design constraints to achieve timing closure of… more
- Qualcomm (San Diego, CA)
- …tradeoffs Programming and scripting skills Strong collaboration and communication skills STA timing Power analysis **Minimum Qualifications:** * Bachelor's ... to work on QUALCOMMs Adreno Graphics cores in the area of Graphics implementation , Advanced Process Technology and methodology. The Design Technology Engineer… more
- Qualcomm (San Diego, CA)
- …entire low power, high performance ASIC/SoC design flows (micro-architecture, RTL design , verification, synthesis, timing / STA , UPF, CLP, LEC formal ... using PowerArtist and PrimeTime PX (PTPX) and work with cross-functional teams - design , implementation , and physical design teams - to optimize power. +… more