- Amazon (Cupertino, CA)
- …for in the United States. In Annapurna Labs we are at the forefront of hardware co- design not just in Amazon Web Services (AWS) but across the industry. The work we ... while also being deeply important to our customers. We design and build every component of our hardware and...the future with us! Responsibilities: * Participate in logic design activities as part of Amazon's machine learning custom… more
- Google (Sunnyvale, CA)
- …of hardware experiences, delivering unparalleled performance, efficiency, and integration. As a TPU SoC RTL Design Engineer , you will join a team working on ... on computer architecture. + 8 years of experience in ASIC design with 3 years of experience...subsystem's design microarchitecture specifications. + Develop SystemVerilog RTL to implement logic for ASIC products… more
- Google (Mountain View, CA)
- …field, or equivalent practical experience. + 5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog ... or Video Codecs. + Experience with Application-Specific Integrated Circuit ( ASIC ) design methodologies for clock domain checks...this role, you will be responsible for Register-Transfer Level ( RTL ) design development of camera and machine… more
- Google (Sunnyvale, CA)
- …experiences, delivering unparalleled performance, efficiency, and integration. As a Tensor Processing Unit (TPU) RTL Design Engineer , you will be part of a ... subsystem's design microarchitecture specifications. + Develop SystemVerilog RTL to implement logic for ASIC products...teams to create test plans to verify and debug design RTL . + Work with Physical … more
- Cisco (San Jose, CA)
- … ASIC team can provide. You will work with exceptional talent with vast ASIC design and development expertise. With Cisco being a systems company, you will ... first customer shipments. Your Impact You are a diligent Design /SDC Engineer with strong analytical skills and...timing modes. * Option to also do block level RTL design or block or top-level IP… more
- Meta (Sunnyvale, CA)
- …Area. 16. Knowledge of front-end and back-end ASIC tools. 17. Experience with RTL design using SystemVerilog or other HDL. 18. Experience managing multiple ... (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1....Synthesis & Integration Engineer 15. Experience with RTL Synthesis and design optimization for Power,… more
- Meta (Sunnyvale, CA)
- …Area. 15. Knowledge of front-end and back-end ASIC tools. 16. Experience with RTL design using SystemVerilog or other HDL. 17. Experience managing multiple ... (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1....Synthesis & Integration Engineer 14. Experience with RTL Synthesis and design optimization for Power,… more
- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and ... signal routing - As a key member of the ASIC design team, you will implement and...related technical field - 5+ years of experience in RTL design for SOC - 5+ years… more
- Cisco (San Jose, CA)
- …* Bachelor's degree in Electrical or Computer engineering and 12+ years of ASIC Design experience. * Verilog/System Verilog programming experience. * Interactive ... * Master's degree in Electrical or Computer engineering and 8+ years of ASIC Design experience. * Experience resolving setup and hold timing violations… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer . NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This ... & bus protocols, interconnect networks and/or caches. + Great understanding of ASIC design flow including RTL design , verification, logic synthesis… more
- Tarana Wireless (Milpitas, CA)
- This position will challenge you! The Senior ASIC Engineer will work on complex ASIC designs for our point to multipoint wireless products. + Architecture ... and micro-architecture of digital subsystems + RTL design of digital circuits using Verilog...design of digital circuits using Verilog + Frontend design development and integration of large ASIC … more
- Cisco (San Jose, CA)
- …Bachelor's Degree in EE, CE, or other related field. * 7+ years of related ASIC design verification experience. * Proficient in ASIC verification using ... and review of code and functional coverage. * Ensure RTL quality with qualifying the design with...design in emulation. * Oversee and manage the ASIC bring-up process. Who You Are The Core Hardware… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON...drive architectural feasibility studies, develop timing, power and area design targets, and explore RTL / design … more
- Meta (Sunnyvale, CA)
- …our ASIC engineers to build "Green" data center accelerators. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own ... **Summary:** Meta is seeking an ASIC Engineer to join our Infrastructure...power and higher performance trade-offs. 4. Work with the RTL design team to understand partition architecture… more
- MetaOption, LLC (Milpitas, CA)
- Sr. Front-End ASIC Design Engineer Candidate needs SoC/ ASIC experience working hands on currently, with non-off the shelf designs. - Compute (ie, CPUs), ... IO (PCIe, Ethernet, etc.) are useful experience. Description We are seeking a Front-End SoC/ ASIC Design Engineer for our SoC business unit. Responsibilities… more
- Meta (Sunnyvale, CA)
- …Internal tools development and automation to help improve productivity across ASIC design cycles including but not limited to RTL generation tools, memory ... on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , EDA Infrastructure Responsibilities: 1. Front End implementation flow… more
- Meta (Sunnyvale, CA)
- …efficient System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our...to improve performance and power. 5. Work with the RTL design team to understand partition architecture… more
- Amazon (Cupertino, CA)
- … design quality and making the right trade-offs. Key job responsibilities As an ASIC Design Engineer , you will: * Develop and implement high-performance, ... rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze...area and power-efficient RTL designs to meet project specifications and targets *… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is seeking an ASIC Engineer , Design to join our Infrastructure organization to build cutting edge ASICs in fields such as machine learning, ... engineers to build "Green" data center accelerators. **Required Skills:** ASIC Engineer , Design Responsibilities: 1....Design Responsibilities: 1. Work on Micro-architecture development and Design / RTL coding 2. Work with design… more
- Meta (Sunnyvale, CA)
- …PLL, etc) 13. Knowledge of front-end ASIC flows 14. Experience with RTL design using SystemVerilog or other HDL. 15. Experience with communicating across ... on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Static Verification Responsibilities: 1. Perform Flat… more