• ASIC Implementation Engineer

    Meta (Austin, TX)
    …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Timing Responsibilities: 1. Develop Timing ... **Summary:** Meta is hiring ASIC Frontend Implementation Engineers within our...and the top-level including SOC. 2. Analyze the inter-block timing and come up with IO budgets for the… more
    Meta (01/23/25)
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  • ASIC Implementation Engineer

    Meta (Austin, TX)
    …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1. Run ... **Summary:** Meta is hiring ASIC Frontend Implementation Engineers within our...optimization techniques and generate optimized Gate Level Netlist for Timing , Area, Power. 2. Debug the timing /area/congestion… more
    Meta (01/23/25)
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  • ASIC Implementation Engineer

    Meta (Austin, TX)
    …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Static Verification Responsibilities: 1. ... **Summary:** Meta is hiring ASIC Frontend Implementation Engineers within our...Qualifications: 16. Experience with SOC Design Integration and Front-End Implementation . 17. Knowledge of Timing /physical libraries, SRAM… more
    Meta (01/23/25)
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  • ASIC Engineer , Physical Design

    Meta (Austin, TX)
    …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own physical ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure organization....We are looking for individuals with experience in backend implementation from Netlist to GDSII in low power and… more
    Meta (01/21/25)
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  • ASIC Engineer , Design

    Meta (Austin, TX)
    …complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to...in test plan development and debug 7. Collaboration with implementation team to close the design on timing more
    Meta (12/11/24)
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  • ASIC Engineer , Design

    Meta (Austin, TX)
    …complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Micro-architecture development. 2. RTL ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to...in test plan development and debug. 6. Collaboration with implementation team to close the design on timing more
    Meta (01/10/25)
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  • ASIC Engineer , Design

    Meta (Austin, TX)
    …complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to...in test plan development and debug 6. Collaboration with implementation team to close the design on timing more
    Meta (01/03/25)
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  • ASIC Engineer , Design

    Meta (Austin, TX)
    …complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration. 2. Micro-architecture ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to...in test plan development and debug. 5. Collaboration with implementation team to close the design on timing more
    Meta (12/06/24)
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  • Sr ASIC Modem design Engineer

    Amazon (Austin, TX)
    …underserved communities around the world. Come work at Amazon! We're hiring a Sr. Modem Engineer within a high performance ASIC design team. This team is using ... system specification to chip specification to RTL to optimizing timing / power to chip level validation. . Develop... and power targets by working closely with the implementation team. . Learn about requirements and solutions for… more
    Amazon (11/16/24)
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  • ASIC Physical Design Engineer

    Amazon (Austin, TX)
    …of physical design: full chip floorplanning, circuit analysis, power/clock distribution, timing optimization, place and route, power integrity analysis, and physical ... with RTL, DFT designers to ensure high quality design implementation Basic Qualifications - Enrolled in a Bachelors' degree...at least one or more VLSI circuit design and implementation classes and done lab projects Preferred Qualifications -… more
    Amazon (11/16/24)
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  • Sr. ASIC Design Engineer , Project…

    Amazon (Austin, TX)
    …& the impact of DFT on the blocks . Perform initial synthesis & timing analysis . Assist verification team in unit verification including test plan development . ... years of experience in digital design, preferably in SoC design and implementation Preferred Qualifications Master's or Ph.D degree in Electrical / Communications… more
    Amazon (11/14/24)
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  • Physical Design Engineer

    Qualcomm (Austin, TX)
    …to help create a smarter, connected future for all. QCTs Digital ASIC Team is actively seeking candidates for several physical design engineering positions ... SOC and core design team. As a physical design engineer you will innovate, develop, and implement chips and...also involve the development and enablement of low power implementation methods, customized P&R to achieve area reduction, performance,… more
    Qualcomm (10/29/24)
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  • Digital Design Engineer

    Meta (Austin, TX)
    **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will work with a world-class group of researchers and engineers, and use your digital design ... virtual and augmented reality systems. **Required Skills:** Digital Design Engineer Responsibilities: 1. Responsible for top-level or block level uArchitecture… more
    Meta (11/01/24)
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  • Senior FPGA Digital Design Engineer

    BAE Systems (Austin, TX)
    **Job Description** BAE Systems has an open position for a Senior FPGA Digital Design Engineer ! See what you re missing. Our employees work on the world s most ... Group is looking for a Senior FPGA Digital Design Engineer to support FPGA designs through all phases of...architecture, ownership of RTL coding, synthesis, place and route, timing closure, basic test bench development, lab testing, product… more
    BAE Systems (10/30/24)
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  • Senior Principal FPGA Design Engineer

    BAE Systems (Austin, TX)
    **Job Description** BAE Systems is seeking a Senior Principal FPGA Design Engineer ! See what you re missing. Our employees work on the world s most advanced ... Group is looking for a Senior Principal FPGA Design Engineer to support FPGA designs through all phases of...architecture, ownership of RTL coding, synthesis, place and route, timing closure, basic test bench development, lab testing and… more
    BAE Systems (10/30/24)
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  • Digital Design Engineer , Project Kuiper

    Amazon (Austin, TX)
    …communities around the world. Come work at Amazon! We're hiring a Digital Design Engineer within a high performance ASIC design team. This team is using ... system specification to chip specification to RTL to optimizing timing / power to chip level validation. . Develop... and power targets by working closely with the implementation team. . Learn about requirements and solutions for… more
    Amazon (01/17/25)
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