- Cadence Design Systems, Inc. (San Jose, CA)
- …flows, Extraction, Power, EMIR and/or physical design and ensure integrity of delivered solutions . Individual should be able to efficiently work with Cadence R&D to ... concepts, derates, PBA tim ing, Distributed, Concurrent and Hierarchical STA flows. . Work efficiently with R&D and customer...customer designs. . Work on In-design timing ECO optimizations solutions with basic knowledge of Place and Route, Clock… more
- Broadcom (San Jose, CA)
- …Broadcom's ASIC Product Division is seeking candidates for HBM/DDR/SERDES Verification Lead Engineer position at our San Jose, California Development ... seeking a highly skilled HBM and SerDes DFT Verification Engineer to join our dynamic team. In this role,...drive innovation within the team. + Working closely with STA and DI Engineers design closure for test +… more
- Belcan (Palo Alto, CA)
- Sr. Physical Design Engineer Job Number: 354330 Category: Design Engineering Description: Job Title: Sr. Physical Design Engineer Pay rate: $66.34 /hr. Location: ... Keywords: #PaloAltoJobs; #PhysicalDesignEngineerjobs; Job Description: As a Sr. physical design engineer , you will contribute to all design phases of physical design… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is looking for an experienced ASIC Packaging Engineer , Signal Integrity, and Power Integrity focus for its ASIC packaging team to support the ... development of custom Silicon for Infrastructure as well as to develop packaging solutions that are optimal for our ASIC roadmap. We are building a competency in… more
- Google (Sunnyvale, CA)
- …cross-functional teams, including chip top design, physical design, Static Timing Analysis ( STA ), package, and system teams. + Experience with 2.5D/3D package design ... (eg, silicon interposer, silicon bridge, 3D die stacking, STA , Voltage budget). + Expertise in signal and power...of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products.… more
- Broadcom (San Jose, CA)
- …division is a leader in semiconductor innovation, delivering cutting-edge custom silicon solutions for AI, networking, HPC among many other applications. We are ... domains crossings. **Key Responsibilities:** **Technical Leadership and Domain Expertise:** + Lead the design and implementation of advanced digital blocks and… more
- Broadcom (San Jose, CA)
- …Account, please Sign-In before you apply.** **Job Description:** **Senior Custom ASIC Engineering Lead ** Are you a versatile, senior engineer capable of leading ... internal cross-functional teams in areas such as physical design, STA , DFT, and packaging? Have you taped out so...Our ASIC products division is looking for a senior engineer to guide Customer teams designing challenging chips in… more