• Memory System Quality Architect

    NVIDIA (Santa Clara, CA)
    …in a related hardware engineering role. + Deep understanding of memory sub - systems as used in high- performance computing, including DDR/5/6, LPDDR4/5/6, ... improvements to advanced DDR and LPDDR technologies and the systems built using them to balance performance ,...to Nvidia product segment goals. You will work with memory system architects and external vendors to… more
    NVIDIA (12/26/24)
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  • Hardware System Engineer, NPI HDD

    Meta (Menlo Park, CA)
    …of storage systems (HDD, NVMe, TLC, QLC, SATA), compute (x86/ARM), Memory (DDR4/5, LPDDR5, HBM), GPU/Accelerators, and/or system management (BMC, System ... to demonstrate the value, enable go/no-go decisions, and finally optimizing these systems for at-scale production. **Required Skills:** Hardware System Engineer,… more
    Meta (02/05/25)
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  • Sr. System Development Engineer, AWS…

    Amazon (Cupertino, CA)
    …innovative services which validate, manage and monitor the critical components like CPUs, memory , PCIe sub - systems in millions of AWS servers. ... across teams/roles to deliver results. - Be responsible for overall system architecture, scalability, reliability, and performance . - Mentor other… more
    Amazon (02/21/25)
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  • SOC Platform Architect

    Qualcomm (Santa Clara, CA)
    …and scalable architectures across key technologies including heterogenous compute, memory systems , interconnects, multimedia, AI/ML, multi-die, power-management ... (micro-architecture) + Demonstrated deep technical knowledge and achievements at the SoC, sub - system or large IP levels as micro-architect or architect +… more
    Qualcomm (02/03/25)
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  • Silicon Performance Architect

    Meta (Sunnyvale, CA)
    …modeling and/or performance architecture 10. Understanding of SoC Architecture, NoCs, memory sub - system , Quality of Service (QoS), and heterogeneous ... that leverage Mixed Reality (MR) and Augmented Reality (AR). The compute performance and power efficiency requirements of MR and AR necessitate custom silicon… more
    Meta (03/04/25)
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  • Sr. Front-End ASIC Design Engineer

    MetaOption, LLC (Milpitas, CA)
    …backgrounds acceptable). * Skills Required - Micro-architecture at module/ sub - system /chip-level; digital design of complex modules/ sub - systems , with ... solid understanding of clock-domain crossings; integration of IPs/modules/ sub - systems designed by internal/external teams; experience using AMBA bus protocols; … more
    MetaOption, LLC (03/15/25)
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  • Member of Technical Staff 2 - Core Data Path

    Nutanix (San Jose, CA)
    …Distributed Storage Fabric (NDSF) - a high- performance shared-nothing distributed file system . We have sub -teams under the CDP umbrella which focus on ... Development role for the Nutanix Distributed Storage Fabric (NDSF) - a high- performance shared-nothing distributed file system . This storage stack is the… more
    Nutanix (03/18/25)
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  • Front-End ASIC Design Engineer

    Kelly Services (Milpitas, CA)
    …at module/ sub - system /chip-level + Digital design of complex modules/ sub - systems + Solid understanding of clock-domain crossings + Integration of ... A new, innovative enterprise that designs, develops and delivers System -on-Chip products to customers worldwide is focused on imaging,...IPs/modules/ sub - systems designed by internal/external teams + Experience… more
    Kelly Services (03/07/25)
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  • Hardware Electrical Engineer, Watch

    Google (Mountain View, CA)
    …based on product outlook and end-user experiences. + Design, develop, and review systems and sub -components from concept to mass production. Perform detailed ... years of experience working in the consumer electronics industry, and embedded system design. + Experience with lab equipment: digital multimeter, spectrum analyzer,… more
    Google (03/04/25)
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  • Sr. ASIC Design Engineer, Cloud-Scale Machine…

    Amazon (Cupertino, CA)
    …- Have familiarity with accelerator design, interconnects, DMAs, Memory sub - systems , CPU cores, SIMDs, debug and system level architectures - Have a ... and Japan, and customers across all industries. Custom SoCs ( System on Chip) live at the heart of AWS...ASIC Design Engineer, you will: * Develop and implement high- performance , area and power-efficient RTL designs to meet project… more
    Amazon (03/15/25)
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  • Software Engineering Manager - Surface Coverage

    Meta (Menlo Park, CA)
    …16. Experience leading and managing complex cross-functional programs 17. Knowledge of operating systems , file systems , and memory structures on Windows, ... caused by unauthorized access or inappropriate usage of Meta's systems and data. To do so, we build platforms...internal abuse. Surface Coverage (SC) is one of four sub -pillars within XDR, and our vision is to detect… more
    Meta (02/06/25)
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  • Senior Platform Software Architect, Silicon

    Google (Mountain View, CA)
    …use cases and applications, and how they relate to specific hardware blocks or sub - systems . You will represent the goals of the software team, their asking ... computer architecture concepts, including microarchitecture, cache hierarchy, pipelining, and memory subsystems. + 5 years of C or C++...in the area of consumer electronics or other embedded systems . + 3 years of experience in driving ASIC… more
    Google (03/04/25)
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  • Advanced Package Technology Engineer

    Broadcom (San Jose, CA)
    …& customers and is responsible for developing cost effective high performance , advanced custom package solutions achieving signal integrity, thermal, structural ... & qualification; program management with external assembly partners -Lead in memory supplier(s) engagement to define technology and quality requirements. -Interface… more
    Broadcom (03/13/25)
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  • Senior Mixed Signal Design Engineer

    NVIDIA (Santa Clara, CA)
    …such as Cadence virtuoso. + Optimize circuit to meet the specifications for system performance . + Work with layout engineers by providing detailed floorplan ... team building next generation High Speed IOs for GDDR/HBM Memory Interfaces. This position offers the opportunity to have...Analog / Mixed Signal Circuit Design Experience in deep sub -micron process (especially in FINFET). + Experience with design… more
    NVIDIA (02/01/25)
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