- Cisco (San Jose, CA)
- …With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on Design-for-Test. ... in crafting groundbreaking next generation networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow and… more
- Cisco (San Jose, CA)
- …on performing project tasks and problem solving. * Collaborate with the verification, PD, DFT , Package and SW teams to develop next generation AI Switching ASIC. * ... and delivering project milestones and deadlines. * Ability to communicate technical concepts to audiences spanning executives to junior engineers to customers.… more
- Google (Mountain View, CA)
- …and deliverables. + Work closely with system, software, design, Design for testing ( DFT ) and physical implementation stakeholders to make technical decisions. + ... primary point of contact for functional verification for cross-functional teams and lead or drive the building of reusable design verification (DV) infrastructure… more
- NVIDIA (Santa Clara, CA)
- …of the various communication link designs used in next generation GPUs. + Be a mentor/ technical lead for junior team members. What we need to see: + BSEE ... circuits, eg power gating, decaps, multi-vt is required. + Understanding of Design-for-test ( DFT ) and logic design is a plus. + Proficiency in scripting language,… more
- Qualcomm (Santa Clara, CA)
- …needs of the server product. **Position: Server High Performance Compute Microarchitecture Lead ** We are seeking experienced CPU Subsystem Leads to join our team. ... developing debug features associated with high performance designs + Strong technical documentation skills, along with excellent written and verbal communication… more
- Broadcom (San Jose, CA)
- …you already have a Candidate Account, please Sign-In before you apply.** **Job Description:** Technical Lead for Physical Designs Are you a versatile, senior ... resident expert in areas such as physical design, STA, DFT , and packaging? Have you taped out so many...globe connected. Our ASIC products division is looking for senior , physical design engineering veterans to guide teams designing… more
- NVIDIA (Santa Clara, CA)
- …of digital designs using direct and random testing methodologies + Lead front-end design flows (Lint/CDC/Synthesis/ DFT /LEC/STA) and coordinate with back-end ... looking for a Digital Design Manager role? As a Senior Digital Design Manager in our Mixed-Signal High-Speed I/O...Manager in our Mixed-Signal High-Speed I/O SerDes group, you'll lead a team working on NVIDIA's latest groundbreaking technology… more