- Google (Mountain View, CA)
- …+ Experience with Formal, FPGA, or Machine Learning (ML)-based design verification . + Experience with job scheduling and DV regression management. + ... Aided Design (CAD) tools and flows or design verification . + Experience with HDL ...across functional domains to enable development and deployment of DV solutions. + Drive EDA vendors to improve their… more
- Capgemini (San Jose, CA)
- …PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - Mixed-Signal Design Verification Engineer_ **Location:** _CA-San Jose_ **Requisition ID:** _078939_ ... **Job Role: Senior ** **Mixed Signal DV Engineer** **Job...This role will provide the ability to directly influence design related changes as required to meet functional specifications.… more
- Cisco (San Jose, CA)
- …Who You Are The Core Hardware Business Unit is on the lookout for a driven Senior Verification Engineer to join us in developing the next generation of Silicon ... Specific responsibilities include: * Architect block, cluster and top-level DV environment infrastructure. * Develop DV infrastructure...other related field. * 7+ years of related ASIC design verification experience. * Proficient in ASIC… more
- Cisco (San Jose, CA)
- …customer shipments. What You'll Do * You will participate in the ASIC design verification for Cisco high-end switching products. * Development of simulation ... with outstanding talent and vast ASIC development expertise in design , DV , DFT, physical design ,...* Experience in System Verilog/UVM. * Experience with ASIC design and verification processes, debugging, methodology, and… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior System Verification Engineer to join our Emulation division. We are a worldwide recognized division noted for groundbreaking ... and GPU Coherency + We have continual collaboration with Design , DV , Power, Silicon Validation, Performance, and...Be familiar with hierarchical design approach, top-down design , SoC and system level verification . +… more
- NVIDIA (Santa Clara, CA)
- …test fails and emulator environment issues. + We have continual collaboration with Design , DV , Power, Silicon Validation, Performance, and Software teams. + Work ... + Be familiar with hierarchical design approach, top-down design , SoC and system level verification . + Candidates will be working on-site at our Santa Clara,… more
- Cisco (San Jose, CA)
- …with focus on reuse. * Defining new DV methodologies. * End-to-end verification of one or more design blocks simultaneously while helping the full ... the world. You will engage in dynamic collaboration with Senior micro-architects, designers, and verification engineers and... of very complex ASICs. You will have a Design Verification background, in-depth experience in System… more
- Cisco (San Jose, CA)
- …world What You'll Do The Core Hardware Business Unit is looking for a motivated Senior Verification engineer/lead to engage in new development of our UCS family. ... DV environments and enhancing them * Ensuring complete verification coverage through implementation and review of code and...ASIC bring up Minimum Qualifications * 8+ years ASIC design verification experience with Bachelor's or Master's… more
- Cisco (San Jose, CA)
- …Routers, switches, schedulers, buffers, traffic manager etc. * Experience with ASIC Design verification , silicon bring-up, and post silicon validation. * ... company in the world. You will engage in dynamic collaboration with Senior micro-architects, designers, and verification engineers and interact with… more