- NVIDIA (Santa Clara, CA)
- …life's work, to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer(s) - PPA ... technology-focused company. What you will be doing: + Developing Efficient physical design methodologies for implementation of graphics processors and SOCs. +… more
- NVIDIA (Santa Clara, CA)
- …life's work, to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer(s) to join ... impact in a technology-focused company. What you will be doing: + Developing physical design methodologies for implementation of graphics processors and SOCs. +… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. What you will be doing: + Developing innovative physical design methodologies for implementation of GPU, CPU and SOCs, with ... PPA (Power, Performance, Area) and runtime improvement of the physical design flow on advanced technology nodes...with internal and external partners to drive tool and methodology improvements to deliver best-in-class PPA solutions across all… more
- NVIDIA (Santa Clara, CA)
- …devices for high-speed optical interconnect and sensing applications. + Developing physical design methodologies for implementation of graphics processors and ... includes developing unique and creative solutions to the state of the art physical design problems that are needed for NVIDIA chips. + Participate in developing… more
- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new ... building an environment that celebrates knowledge-sharing and mentorship. Our senior members enjoy one-on-one mentoring and thorough, but kind,...in EE/CS - 5+ years of experience in developing physical design methodology or CAD… more
- NVIDIA (Santa Clara, CA)
- …aging, self-heating, thermal impact, IR drop etc. + Collaborate with technology leads, VLSI physical design , and timing engineers to define and deploy the most ... human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive...sophisticated strategies of signing off timing in design for world-class silicon performance. + Develop tools, and… more
- NVIDIA (Santa Clara, CA)
- …EDA tools from Synopsys (DC/FC), Cadence (Genus/Innovus) + Strong understanding of physical design implementation eg: physical synthesis, placement, routing, ... We are looking for a Senior CPU Implementation Methodology Engineer to...out from the crowd: + Prior CPU experience in physical implementation methodology + Proficiency in Perl,… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. If you ... intelligence. What you'll be doing: + Drive next generation physical design work to achieve best in...of circuits and SPICE, as well as experience in methodology and/or flow development and automation. NVIDIA is widely… more
- Cisco (San Jose, CA)
- …and guide them in refining design and timing constraints for seamless physical design closure. As part of this team, you'll contribute to developing ... team who oversees fullchip SDCs and works with physical design and DFT teams to close...block or top-level IP integration. * Helping develop efficient methodology to promote block level SDCs to fullchip, and… more
- Cisco (San Jose, CA)
- …* Develop and analyze functional coverage. * Help define, evolve, and support our design methodology . * Collaborate with the verification team to address ... design bugs and close code coverage. * Work closely with the physical design team to close design timing and place-and-route issues. * Triage, debug, and… more
- Cisco (San Jose, CA)
- …to meet timing and performance requirements. * Help define, evolve, and support our design methodology . * Mentor junior engineers on performing project tasks and ... address design bugs and close code coverage. * Work closely with physical design team to close design timing and place-and-route issues. * Perform… more
- Cisco (San Jose, CA)
- …Work With You will work with outstanding talent and vast ASIC development expertise in design , DV, DFT, physical design , and post-silicon validation The team ... related experience * Experience in System Verilog/UVM. * Experience with ASIC design and verification processes, debugging, methodology , and tools. * Experience… more
- Broadcom (San Jose, CA)
- …and features as well as manage extremely large volumes of internet traffic. As a Senior Physical Design Engineer, the ideal candidate will be responsible for ... signal and power EM checks. . Methodology & Flow development of Physical Design and Timing Closure. . Interfacing with internal and external teams including … more
- Motion Recruitment Partners (Palo Alto, CA)
- Senior Hardware Engineer Palo Alto, CA **Onsite** Contract $70/hr - $75/hr Physical Design Engineer As a Physical Design Engineer, you will ... contribute to all design phases of physical design of high performance SoC ...and isolation. + Define EM-IR signoff requirements and sign-off methodology . + Define and support Static and Dynamic, thermal,… more
- Cisco (San Jose, CA)
- …delivery networks * Performing physical measurements to collect data for design validation and simulation correlations * Driving methodology enhancements and ... enterprise and cloud networking SI team is seeking a Senior Signal & Power Integrity Engineer for the analysis...Signal & Power Integrity Engineer for the analysis and design of high-speed components, interfaces, and power distribution networks.… more
- NVIDIA (Santa Clara, CA)
- …inventiveness and intelligence. Be part of a diverse team creating NVIDIA's chip design methodology ! We're responsible for the Front-End Design ... of Python, Perl , Tcl, C/C++ + Knowledge or experience with logic synthesis, physical design , formal equivalence checking. + Proven track record developing flows… more
- Celestica (San Jose, CA)
- …& Lean; Working Effectively with Others; D/PFMEA; 8D/Corrective Action; Equipment Safety; Design of Experiments (DOE). ** Physical Demands** + Duties of this ... Country: United States State/Province: California City: San Jose **Summary** The Senior Staff Engineer, Software develops, debugs, tests, deploys and supports code… more
- Google (Fremont, CA)
- …optical devices or display products. + Experience with driving and implementing Design For Reliability (DFR) methodology including Failure Mode and Effects ... JMP or Reliasoft. + Knowledge of optoelectronic device performance requirements and test methodology , particularly for III-V or LED/display products. As a Senior … more
- Siemens (Fremont, CA)
- …Req ID: 457029 Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop ... better products in the increasingly complex world of chip, board, and system design . Job Description: * Deploy Siemens EDA ProFPGA prototyping software and hardware… more
- Palo Alto Networks (Santa Clara, CA)
- …external vendors and internal software teams + Perform lab measurements for design validation and simulation correlations + Drive methodology enhancements and ... Hardware development team, you will play a key role in the complete design cycle of Palo Alto Networks Firewall and SD-WAN hardware including: selecting components;… more