- Qualcomm (San Diego, CA)
- … ASIC engineers with excellent analytical and technical skills, and a focus on low power , high performance ASIC designs, and, ability to execute critical ... low power designs. + Strong knowledge in the entire low power , high performance ASIC /SoC design flows (micro-architecture, RTL design, verification,… more
- Qualcomm (San Diego, CA)
- …with system level architecture, analog design, and silicon test + Experience with High-speed, Low Area, and Low Power architectures + Experience in ... solutions and products are elegantly engineered for optimal performance and power consumption. Our system-on-chip solutions like Snapdragon bring together CPU, GPU,… more
- Amazon (San Diego, CA)
- …underserved communities around the world. Come work at Amazon! We're hiring a Sr. Modem Engineer within a high performance ASIC design team. This team is using ... Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low...to chip specification to RTL to optimizing timing / power to chip level validation. . Develop solutions optimizing… more
- Amazon (San Diego, CA)
- …any necessary support logic . Configure, instantiate and integrate 3rd party IP blocks . Understand low power design & the impact of DFT on the blocks . Perform ... Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low...to develop world-class SOC and IP blocks, which meet power , area and performance targets. . Define, configure and… more
- Qualcomm (San Diego, CA)
- …and studies (including literature and state-of-the-art surveys). - Develop low power /DCVS/voltage/clock/thermal management architectures (HW/FW/SW) including HW ... power design, power management & power architecture experience. - 5+ ASIC design...system) and sensor (analog/digital) usage for high performance and low power . - Strong background in micro-controllers… more
- Qualcomm (San Diego, CA)
- …and verification of advanced DFT/DFD (Design for Test/Design for Debug) techniques for low power , multi voltage designs. The successful candidate will help in ... create a smarter, connected future for all. The Digital ASIC Design Team is currently seeking candidates who will...advanced DFT/DFD (Design for Test/Design for Debug) techniques for low power and multi voltage domain designs.… more
- Qualcomm (San Diego, CA)
- …and proficiency in handling tools such as Design compiler, Fusion compiler, Primetime, Conformal low power , LEC. Scripting skills in tcl , perl or python ... Job Description: **Principal Duties and responsibilities** + Develop constraints for physical power aware synthesis, low power multi voltage domain… more
- Qualcomm (San Diego, CA)
- …transformation to help create a smarter, connected future for all. The DDRSS systems engineer is responsible validating and tuning the DDR subsystem on pre and post ... design, validation teams, and software teams to ensure key power and performance features are enabled in our products....The team is also responsible for delivering and validating low level FW APIs. The candidate will use his/her… more
- Qualcomm (San Diego, CA)
- …Description: Principal Duties and Responsibilities** + Develop constraints for physical power -aware synthesis, setup for various modes/corners and low - power ... Team is looking for skilled engineers to focus on timing constraints development, power analysis, STA, and timing closure for premium-tier chips. This is an… more
- Qualcomm (San Diego, CA)
- …to have experience in: + Emulation environments for pre-silicon prototyping + Debugging low level software and hardware issues + Debug tools including JTAG and ... + CPU and SoC architectures + Basic understanding of power and performance + Experience programming in C +...Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.… more
- Leidos (San Diego, CA)
- …electronics test equipment like function generators, oscilloscopes, logic analyzers, and lab power supplies. + Hands-on development of low -level embedded system ... currently has an opening for a Senior level System Engineer to support a portfolio of programs in our...architectures such as system-on-chip (SoC). As a Sr. System Engineer you will work closely with the Chief … more
- Meta (San Diego, CA)
- …with revision control systems like Mercurial(Hg), Git or SVN. 17. Experience with low power design. 18. Experience working across and building relationships with ... Labs(RL) focuses on delivering Meta's vision through Augmented Reality (AR). Compute power requirements of Augmented Reality require custom silicon. Meta RL Silicon… more
- Qualcomm (San Diego, CA)
- …to 20 years. + Experience with Verilog/SystemVerilog design, Synopsys synthesis, low power design, test plan development, coverage-based design verification ... + Experience with Computer Architecture, Computer Arithmetic, Low power design, C/C++/Python programming languages is desired. + Experience in designing RTL for… more
- Google (San Diego, CA)
- …SystemVerilog. + Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low - power design techniques. + Experience ... or other multimedia IPs such as Display or Video Codecs. + Experience with ASIC design methodologies for clock domain checks and reset checks. + Excellent C/C++… more
- Qualcomm (San Diego, CA)
- …Intelligence) on the Edge. Moreover, Qualcomm innovates in Automotive technology, Low Power High Performance Compute, communication, and high-end data ... the latest best in class DDR. As a Qualcomm ASIC Engineer , you will plan, define, model,...development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers… more