- Capgemini (San Francisco, CA)
- **Job Title: Design Verification Infrastructure Engineer ** **Job Location: Sunnyvale, CA (Remote work is OK)** **Job Description:** **Key ... .Minimum 5 years of strong experience in EDA/CAD SoC/IP design verification and infrastructure development...towards Intelligent Industry. Capgemini Engineering has more than 55,000 engineer and scientist team members in over 30 countries… more
- Meta (Burlingame, CA)
- …the entire stack, from transistor, through architecture, to firmware, and algorithms. As a Design Verification Engineer at Meta Reality Labs, you will work ... and test cases for multiple state of the art IPs. **Required Skills:** Design Verification Engineer Responsibilities: 1. Work with researchers and… more
- Capgemini (San Francisco, CA)
- **Job role:** **Lead DV IP Verification Engineer ** **Job Location : San Francisco CA / Sunnyvale CA** **Job description:** Architect and Create verification ... **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - Lead DV IP Verification Engineer_ **Location:** _CA-San… more
- City and County of San Francisco (San Francisco, CA)
- …has a vacancy for the position of Project Manager I (5502) within the Infrastructure Design and Construction Division. The Infrastructure Design ... of San Francisco Public Works, led by the City Engineer , provides engineering planning and design services,...of capital improvement projects supporting the City's streets and infrastructure . In addition, its Bureau of Street-use and Mapping,… more
- Capgemini (San Francisco, CA)
- **Physical Design Engineer ** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the physical chip ... Timing with SI and OCV, Power, IR and Physical Verification at both block and chip level *Understanding constraints...**Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - ASIC Physical Design Engineer_ **Location:**… more
- City and County of San Francisco (San Francisco, CA)
- …Works currently has a vacancy for an Assistant Construction Inspector within the Infrastructure Design and Construction Division. The Infrastructure ... Design and Construction Division The Infrastructure Design and Construction Division of San Francisco Public Works,...of San Francisco Public Works, led by the City Engineer , provides engineering planning and design services,… more
- Capgemini (San Francisco, CA)
- **RTL Design Engineer ** **Location: San Jose CA / Bay Area, but will consider remote.** **Job description:** . As an RTL Design Engineer you will be ... . Develop micro architectural document from requirements specifications. . Extensive RTL design utilizing Verilog / SystemVerilog . Perform basic linting and other… more
- Capgemini (San Francisco, CA)
- **Job Title : Senior ASIC Physical Design Engineer ** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... Timing with SI and OCV, Power, IR and Physical Verification at both block and chip level + Understanding...block and chip level + Understanding constraints and fixing design /timing techniques + Block level implementation from netlist to… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge machine learning ASICs, capable of world class ... SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge ASICs in fields such as machine learning, video ... SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration. 2. Micro-architecture… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge ASICs in fields such as machine learning, video ... SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture… more
- City and County of San Francisco (San Francisco, CA)
- …Application Deadline: Continuous How to Apply: Applications for Journey Information Systems Engineer - Systems Specialty are only accepted through an online process. ... these systems together as an enterprise networking backbone or platform. The 1042 Systems Engineer is the journey level position in the Engineer series. The… more
- City and County of San Francisco (San Francisco, CA)
- …system engineering work on the Train Control Upgrade Project. During the project design phases, the Associate Engineer will support the project by reviewing ... such as CAD/AVL, asset management systems, SCADA systems, and databases. The Associate Engineer will contribute to the civil engineering design for any enabling… more
- Meta (Fremont, CA)
- **Summary:** Meta is seeking a Mechanical Engineer experienced in the design and operations of critical facilities to become part of our Design Engineering ... in achieving their goals. This position is full-time. **Required Skills:** Mechanical Engineer - DEC, Engineering Responsibilities: 1. Research, design and… more
- City and County of San Francisco (San Francisco, CA)
- …Siemens LRV4 vehicles, historic streetcars, and non-revenue (hy-railer) vehicles. The Associate Engineer will support the successful design , fitment, and testing ... installation, construction support, technical expertise, and professional services. The Associate Engineer will participate in design activities with the… more
- City and County of San Francisco (San Francisco, CA)
- …in the City and County of San Francisco (CCSF). We deliver technology infrastructure and services to approximately 33,000 employees! With an annual operating budget ... Reporting to the Director of IAM & Directory services, the IAM Engineer and will be responsible for the development, deployment, administration, and maintenance… more
- AECOM (Oakland, CA)
- …of system design . + Author test procedures and reports in support of design verification and validation during the project life cycle. + Support and ... QUALIFICATIONS:** + Degree in Electrical Engineering is preferred. + California Professional Engineer License is preferred. + Traction Power design experience… more
- TE Connectivity (San Francisco, CA)
- …Integrity Engineer for TE Connectivity you will focus on the electrical design , simulation, and verification -validation testing of high speed products in the ... Principal Signal Integrity Engineer - Data & Devices At TE, you will...initial analysis through prototype fabrication & evaluation, and production verification testing. You will tackle challenging design … more
- Meta (Menlo Park, CA)
- …The role also involves partnering with Full Stack Software, Hardware, ASIC Design , Verification , Emulation, Pre/Post-Silicon Validation & Systems teams to ... **Summary:** Meta is hiring ASIC Engineers within the Infrastructure organization. We are looking for individuals with...to guide future improvements. 3. Work directly with the design & verification team to enable a… more
- AECOM (Oakland, CA)
- …of system design . Author test procedures and reports in support of design verification and validation during the project life cycle. + Produce conceptual ... Description** **At AECOM, we're delivering a better world.** We believe infrastructure creates opportunity for everyone. Whether it's improving your commute, keeping… more