- Meta (Sunnyvale, CA)
- … DFT EDA tools and IEEE standards (1149, 1500, 1687). **Required Skills:** ASIC Engineer , DFT Responsibilities: 1. Develop and implement DFT ... **Summary:** Meta is hiring ASIC DFT Engineers within our Infrastructure organization to work on Design for Test ( DFT ) methodologies, implementation, and… more
- Cisco (San Jose, CA)
- …Work With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on Design-for-Test. ... physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a...networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow… more
- Qualcomm (Santa Clara, CA)
- …digital transformation to help create a smarter, connected future for all. As a DFT Engineer you will work with chip architects, chip designers, implementation ... in digital ASIC design; experience using Verilog or VHDL + Experience with ASIC test, DFT , and debug + 5+ years of practical experience with test or DFT … more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At...CMOS analog circuit and physical design + Knowledge of DFT /Scan/MBIST/LBIST and understanding of their impact on physical design… more
- Meta (Sunnyvale, CA)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run Logic/Physical Synthesis using ... **Summary:** Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization....with the Designers to create waivers. 5. Perform RTL DFT Analysis and improve the DFT coverage… more
- Cisco (San Jose, CA)
- …you directly if a relevant position opens. Who You'll Work With The ASIC Group works closely with other development teams within Cisco, including marketing, system ... of award-winning communications and network processing silicon/ASICs, Cisco's Core ASIC Group will soon begin development of multiple next-generation designs.… more
- Cisco (San Jose, CA)
- …you directly if a relevant position opens. Who You'll Work With The ASIC Group works closely with other development teams within Cisco, including marketing, system ... of award-winning communications and network processing silicon/ASICs, Cisco's Core ASIC Group will soon begin development of multiple next-generation designs.… more
- NVIDIA (Santa Clara, CA)
- The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification. The NVIDIA Clocks Team is ... reset logic to various units in SOC and GPU ASIC . The complexity of the clocks and resets design...implementing Test plans for pre-silicon platforms. + Understanding of DFT /IST is optional. We have some of the most… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want ... such as GPUs, CPUs, DPUs/Network processors, or SOCs + Understanding of DFT logic and experience with DFT timing closure for various modes eg, scan, BIST, etc. +… more
- Amazon (Cupertino, CA)
- …scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ... integrate multiple subsystems into top level SOC, ensure correct clock/reset/functional/ DFT signal routing - As a key member of...signal routing - As a key member of the ASIC design team, you will implement and deliver high… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading SoC's and GPU's. This position offers the opportunity to have real ... or Computer Engineering. + 5+ years of proven experience working on ASIC design and development. + Experience in micro-architecture and RTL development of… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer for Memory Controllers. As a Senior Designer at NVIDIA, you'll join a group of hardworking engineers to ... BS or equivalent experience in Electrical Engineering or Computer Engineer or related degree required, advanced degrees (MS, PhD)...+ You have experience with all stages in the ASIC design flow including emulation, prototyping, DFT ,… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The Clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects ... team member, you will be collaborating with other architects, ASIC designers and verification engineers to design high frequency...deliver clock information to SOC verification team, timing and DFT teams. You will use Perl to improve the… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects ... team member, you will be collaborating with other architects, ASIC designers and verification engineers to design high frequency...to GPU, CPU and SOC verification team, timing and DFT teams. You will use Perl to improve the… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. If ... + Understanding of high-speed clock distribution and planning as well as impact of DFT logic in timing convergence. + Knowledge of circuits and SPICE, as well as… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer , Netlisting to join our dynamic and growing ... flow. + Strong hands-on debugging capability and problem-solving skills. + Background in DFT timing closure for various modes eg scan shift and capture, transition… more
- Amazon (Cupertino, CA)
- …to improve physical design flows and methods * Collaborate with RTL, DFT designers to ensure high quality design implementation Basic Qualifications - Enrolled ... in a Bachelors' degree program or higher in Electrical Engineering, Computer Engineering, or a related field with a graduation conferral date between December 2025 and September 2026 - Scripting internship/project experience with Python, Perl or equivalent -… more
- Amazon (Sunnyvale, CA)
- …by running and tracking results of front-end tools including: Synthesis, Lint (RTL, DFT , UPF), Power Analysis and STA - Work with pre-silicon verification teams to ... assist in defining test-plans/test-benches - Work with post-silicon validation teams to define and execute on test-plans - Write high quality documents to guide a scalable team Basic Qualifications - Bachelor's degree in Electrical Engineering, Communications… more
- Cisco (San Jose, CA)
- …Work With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on Design-for-Test. ... physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a...activities. What You'll Do You will be part of ASIC physical design Team which is responsible for full… more
- SpaceX (Sunnyvale, CA)
- …as necessary to support critical milestones COMPENSATION & BENEFITS: Pay range: ASIC /FPGA Design Engineer /Senior: $170,000.00 - $230,000.00/per year Your actual ... Sr. DDR IP Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX...cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing… more