- Cisco (San Jose, CA)
- …* You will also collaborate with packaging and hardware design team to ensure signal and power integrity specifications are met. Who you'll work with: * You ... plus: Passive component design: inductors, -transformers, transmission-lines, etc. -Floorplanning ( power /ground, digital/analog signal routing, etc.) -Custom transistor… more
- Qualcomm (Santa Clara, CA)
- …optimization, RFIC / Analog IC Design, PA architectures, RF Front-End Engineering, Signal Processing/Integration, RF microwave design, power amplifiers, WLAN / ... Amplifiers, Transmitter, Receiver, ACLR + Layout experience and chip tape-out + Programming Experience in Perl, MATLAB, Cadence,...signal IPs + Cadence Design Environment + Low power analog/digital design + Perl, Verilog, Shell, Python, Tcl,… more
- Cisco (San Jose, CA)
- …component design: inductors, transformers, transmission lines, etc.) * Floorplanning ( power /ground, digital/analog signal routing) * Custom transistor layout ... Who we are Acacia designs intelligent transceivers using advanced signal processing and photonic integration for the 100G, 400G...definition and implementation of large-scale block on a complex chip . * You will mentor team members and track… more
- Lightmatter (Mountain View, CA)
- Analog / Mixed- Signal IC Design Engineer Lightmatter builds chips that enable extreme-scale artificial intelligence computing clusters. If you're a collaborative ... and location. Responsibilities + Participate in the architecture development with our chip architects by leading feasibility studies + Collaborate with other design… more
- Google (Sunnyvale, CA)
- …point of load application. You will design, analyze, optimize, and implement board, substrate package , and chip level power delivery topologies for point of ... degree. + Experience with power management methodologies, power delivery, and signal integrity interactions of...package and silicon technologies, and their impact on power delivery solutions. Preferred qualifications: + Master's or PhD… more
- NVIDIA (Santa Clara, CA)
- …of high-speed IOs, including NVLink and NVLink-C2C. + Responsible for IO power optimizations and continuing to push energy efficiency. + Ensure interoperability with ... closely and proactively with other engineering teams such as system architects, mixed signal and design, DGX, software/firmware, HW/SW QA, operations and AE teams to… more
- Siemens Digital Industries Software (Fremont, CA)
- …) o Package Design Cadence (APD/SiP), Siemens (XSI/XPD) o Signal / Power integrity analysis: Siemens (HyperLynx SI/PI), Ansys (Redhawk, Totem, Swave), ... deliver better products in the increasingly complex world of chip , board and system design. **Job Overview** Siemens EDA...performing individual for an opportunity to serve as the package design lead in our 3D IC Solutions Engineering… more
- NVIDIA (Santa Clara, CA)
- …pinout incorporating system level trade-offs of pins assignment. + Help perform package routing, placement, stack-up, reference plane and power distribution ... NVIDIA's GPUs and SOCs are the world leaders in power , performance and efficiency. We are continually innovating to...this purpose, we are now seeking a hard-working Senior Package Layout Engineer who is committed to making a… more
- SpaceX (Sunnyvale, CA)
- …physical implementation) + Analysis of clock domain crossing paths at block and full chip level + Work with mixed signal IP/PLL/SerDes/PHY teams to drive ... chip architecture, design verification, physical design, DFT, and power teams to achieve tapeout success on designs -...salary is just one part of your total rewards package at SpaceX. You may also be eligible for… more
- Lightmatter (Mountain View, CA)
- …solutions. This role requires a deep understanding of high-frequency systems-on- chip (SoCs), high-speed (40+ GHz) electro-optic interfaces, silicon photonics, and ... + Creative problem-solving and owning the architectures, characterization plans, and packaging approaches for a successful high-volume product. + Be the AMS… more
- Google (Mountain View, CA)
- …Static timing analysis (STA), electrical checks, and physical verification. + Experience in package design and signal / power integrity (SI/PI) analysis and ... strategies. + Experience in guiding external vendors in RTL-to-GDS2 chip execution. In this role, you will be a...Test (DFT) (Scan, MBIST, BISR), Static Timing Analysis (STA), signal / power integrity (SI/PI), Layout Versus Schematic and… more
- Qualcomm (Santa Clara, CA)
- …within areas of signal integrity, IC packaging , high performance chip / package CPI analysis, power integrity, thermal engineering and more! **Minimum ... Mechanical design, heat transfer, microelectronics device. + Knowledge of IC packaging structures, chip - package , electronic packaging process and … more
- Siemens Digital Industries Software (Fremont, CA)
- …) o Package Design Cadence (APD/SiP), Siemens (XSI/XPD) o Signal / Power integrity analysis: Siemens (HyperLynx SI/PI), Ansys (Redhawk, Totem, Swave), ... physics in order to deliver better products in the increasingly complex world of chip , board and system design. **Job Overview** Siemens EDA is seeking a senior… more
- Cisco (San Jose, CA)
- …will be cooperating with various groups across the globe such as: Board-Design, Software, Signal and Power Integrity, Packaging and Production. Who you ... Switch ASIC Post-Silicon Electrical Validation. You will deal with all chip validation aspects: Building validation plan, Coding the validation SW environment… more
- Power Integrations (San Jose, CA)
- …for external customers. Experience & Requirements: + Experience in failure analysis of power semiconductors, analog, and/or mixed signal IC devices. + Experience ... Power Supply applications, and analog, and/or mixed signal integrated circuit devices. + Fluent verbal, read, and...and the ability to apply fault isolation techniques at chip level as well as PCB at power… more
- Skyworks (San Jose, CA)
- …analog/digital & RF semiconductors, Acoustic Filters and integrating ultra dense System-In- Package solutions that will be powering the next wireless transformation. ... Houses/Smart Cities through IoT, and the AI/ML revolution. Through our broad technology/ packaging expertise and one of the most extensive product portfolios in the… more
- NVIDIA (Santa Clara, CA)
- …GPU or SOC designs. + Owning STA of large subsystems and full chip designs or at block-level with additional responsibilities for block level synthesis/optimization ... Finding the right tradeoffs and balance between frequency and power /area/congestions/yield/etc. What we need to see: + BS (or...+ Hands-on experience in ASIC timing closure at full chip or subsystem level with a good understanding of… more
- NVIDIA (Santa Clara, CA)
- …and package design to understand the different design limitations: power , di/dt, temperature, signal -integrity etc. + Thoroughly understand Ethernet, ... define the POR of our switch product line. + Face the most challenging Full- Chip correctness and performance issues, which cannot be handled by the units' designers… more
- Skyworks (San Jose, CA)
- …to operate RF test equipment, including multi-meters, spectrum analyzers, VNAs, oscilloscopes, signal generators, power meters, and power supplies is ... the wireless networking revolution as you turn on and power -up your career. The ideal candidate should have extensive...soldering fine pitch components, wire bond rework, manual flip chip assembly, precision rework on sensitive devices and RF… more
- Skyworks (San Jose, CA)
- …team of EM Design Engineers, Lab Technicians, Verification Engineers, Test Engineers and Package Engineers to tackle complex cellular RF front end issues + Prepare ... + Familiar with lab instruments including Network Analyzers, Spectrum Analyzers, Signal Generators, RF Probe Stations, Noise Figure Analyzers and Load-pull Tuners… more