- Amazon (Cupertino, CA)
- …to deliver high performance at low cost. Key job responsibilities - Develop formal verification plans, implement and verify state-of-the-art IP architectures. - ... & Career Growth Our team is dedicated to supporting new members. We have a broad mix of experience...related field - 7+ years of practical experience with formal verification as IP/Block owner, or equivalent… more
- Palo Alto Networks (Santa Clara, CA)
- …and the kind of precision that drives great outcomes. **Your Career** As a Design Verification engineer on the ASIC team, you will ensure that the ASICs in ... and debug. You will work on diverse platforms including simulation, emulation, formal verification , and silicon validation. We expect office-based employees to… more
- Arrow Electronics (Mountain View, CA)
- **Position:** Design Verification Engineer **Job Description:** Principal Accountabilities * Responsible for architecting Verification Environment for ASIC ... functional and technical specification documents * Implement and maintain integrated end-to-end formal verification flow for the formal verification… more
- Meta (Sunnyvale, CA)
- …from transistors, through architecture, firmware, and algorithms. **Required Skills:** Design Verification Engineer Responsibilities: 1. Define and implement ... vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips...test benches for block, IP, sub-system, and SoC level verification 2. Develop functional tests based on verification… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior Circuit Verification Engineer to join our dynamic and growing team. Designing RAMs at leading edge process nodes ... of innovative circuits. + Support designer efforts in running formal verification , electronic rule checking, and other...products. + Engaging with industry tool AEs to qualify new tool releases, learn about new tool… more
- Amazon (Cupertino, CA)
- …Electrical or Communications Engineering or a related field - Experience with formal verification techniques including abstraction and end-to-end checking - ... solutions achieve their desired functionality, developing and executing multi-faceted verification /validation plans, and measuring the teams progress towards our… more
- Amazon (Cupertino, CA)
- …Electrical or Communications Engineering or a related field - Experience with formal verification techniques including abstraction and end-to-end checking - ... around the world. We are seeking an experienced Design Verification Engineers to build the next generation of our...& Career Growth Our team is dedicated to supporting new members. We have a broad mix of experience… more
- Microsoft Corporation (Mountain View, CA)
- …in Scripting language such as Python or Perl + Hands on experience in Formal property verification Silicon Engineering IC5 - The typical base pay range ... cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high...infrastructure. We are looking for a **Principal Silicon DV Engineer ** to join the team. **Responsibilities** + Responsible for… more
- SpaceX (Sunnyvale, CA)
- …of design blocks using Verilog/SystemVerilog + Familiar with UPF (unified power format), formal verification , and DRC rule checking experience + Ability to work ... hours and weekends as needed COMPENSATION AND BENEFITS: Pay range: Design Verification Engineer /Level I: $130,000.00 - $155,000.00/per year Design … more
- Microsoft Corporation (Mountain View, CA)
- …Synthesis, Placement, CTS and custom clocking, Routing, Static Timing, Physical Verification , Formal Equivalency, Power Efficiency, IR-Drop, and EM. You ... and we are looking for a **Principal Physical Design Engineer ** to help achieve that mission. As Microsoft's cloud...cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high… more
- NVIDIA (Santa Clara, CA)
- …Strong proficiency in micro-architecture and RTL development using Verilog. + Experience with formal verification using JasperGold is a plus. + Deep expertise in ... We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over...a "learning machine" that constantly evolves by adapting to new opportunities that are hard to solve, that only… more
- Amazon (Cupertino, CA)
- …tools (examples: Cadence, Mentor Graphics, Synopsys, or Others) develop flows for synthesis, formal verification , floor planning, bus / pin planning, place and ... rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and architectures, while… more
- Texas Instruments (Santa Clara, CA)
- …experiences from your very first day on the job. As a Digital IC Design Engineer , you'll architect new TI products and make our customers' visions a reality. ... simulator development, 64-bit vector processor ISA architecture, development and verification etc. As a Digital IC Design Engineer...also get exposure to other roles such as: Design Verification & Analog Design through formal learning,… more
- NVIDIA (Santa Clara, CA)
- …based SOCs + Prior hands-on experience in Ada/SPARK programming (including specification and formal verification ) and TLA+ formal verification modeling ... an exciting opportunity for a talented Senior System Software Engineer to join our dynamic Automotive Team and help...strong C and/or Ada/SPARK programming skills, and experience with formal methods, we want to hear from you! Join… more
- Lockheed Martin (Sunnyvale, CA)
- …any other are with Lockheed Martin Space** **OVERVIEW:** At the dawn of a new space age, Lockheed Martin is a pioneer, partner, innovator and builder\. Our amazing ... does this role look like?** Lockheed Martin is seeking a dynamic, hardworking Systems Engineer to support our SPP programs\. As a Systems Engineer , you will:… more
- Imperative Care (Campbell, CA)
- Title: Senior R&D Engineer This position is based in our Campbell, California offices. This position is on-site, full-time. Why Imperative Care? Do you want to make ... and launch innovative endovascular/neurovascular products through conceptualization, design development, verification /validation, and manufacturability assessments. This role will deliver ideation… more
- Google (Mountain View, CA)
- …Level (RTL) coding, function/performance simulation debug and Lint/Clock Domain Crossing (CDC)/ Formal Verification (FV)/Unified Power Format (UPF) checks. + ... RTL Design Engineer , Multimedia and Machine Learning Accelerators _corporate_fare_ Google...create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless,… more
- Imperative Care (Campbell, CA)
- …test methods and associated fixturing/automation to support both explorative, characterization, and formal verification testing of the Company's products. + Your ... Job Title: Senior R&D Test Engineer Location : This position is based in...of devices for concept selection, design optimization, and design verification in close collaboration with the preclinical and design… more
- Amazon (Cupertino, CA)
- …of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new technologies and architectures, while ... TAT improvements Work with EDA tool vendors to evaluate new methods, resolve bugs, improve usability. Fine tune cloud...and methodologies including synthesis, place and route, STA, IR, formal and physical verification . - Demonstrated level… more
- Micron Technology, Inc. (San Jose, CA)
- …large language models (LLMs) for the purpose of automated Silicon design and Design Verification (DV). The engineer is expected to build LLM based EDA workflows ... + Develop LLM applications to automate electronics design and verification . + Optimize and fine-tune LLMs for the purpose...MLOPs. + Having studied or practical experience in a formal course in Machine Learning, Robotics or Computer Vision.… more