- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze ... 10yrs or MS + 7yrs in EE/CS - 5+ years of experience in developing physical design methodology or CAD flows in synthesis, PNR, and sign-off areas for… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer (s) - PPA Improvement ... impact in a technology-focused company. What you will be doing: + Developing physical design methodologies for implementation of graphics processors and SOCs. +… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. What you will be doing: + Developing innovative physical design methodologies for implementation of GPU, CPU and SOCs, with ... PPA (Power, Performance, Area) and runtime improvement of the physical design flow on advanced technology nodes...with internal and external partners to drive tool and methodology improvements to deliver best-in-class PPA solutions across all… more
- quadric.io, Inc (Burlingame, CA)
- …Happiness What We Expect: Initiative, Collaboration, Completion Role As a member of our physical design methodology team you will be tasked with developing ... physical design methodologies and automation scripts for multiple design configurations across multiple process nodes. Responsibilities + Develop Quadric… more
- NVIDIA (Santa Clara, CA)
- …amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the world's ... aging, self-heating, thermal impact, IR drop etc. + Collaborate with technology leads, VLSI physical design , and timing engineers to define and deploy the most… more
- NVIDIA (Santa Clara, CA)
- We are looking for a Senior CPU Implementation Methodology Engineer to join our VLSI team! If you are looking for a challenging and exciting role and you are a ... from Synopsys (DC/FC), Cadence (Genus/Innovus) + Strong understanding of physical design implementation eg: physical ...out from the crowd: + Prior CPU experience in physical implementation methodology + Proficiency in Perl,… more
- NVIDIA (Santa Clara, CA)
- …today. The NVIDIA Clocks group is looking for a top ASIC Methodology engineer with proven experience in high-speed logic design and verification. In order to ... needs to balance high frequency clocks with power, DFT, noise, circuit and physical design constraints. What you'll be doing: + Develop Clock RTL generation and… more
- NVIDIA (Santa Clara, CA)
- … Design Engineers, Low Power Engineers, Performance Engineers, Software Engineers, and Physical Design teams to study and implement energy modeling techniques ... energy usage in graphics and AI workloads and make improvements in architecture, design , and power management. Today, NVIDIA is tapping into the unlimited potential… more
- NVIDIA (Santa Clara, CA)
- … Design Engineers, Low Power Engineers, Performance Engineers, Software Engineers, and Physical Design teams to study and implement energy modeling techniques ... energy usage in graphics and AI workloads and make improvements in architecture, design , and power management. What you'll be doing: + Define and implement tools… more
- Meta (Sunnyvale, CA)
- …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure...data-path intensive designs. 24. Experience in the 3D-IC technology, methodology , and advanced packaging. 25. Experience in validating Power… more
- Capgemini (Santa Clara, CA)
- **Job Title : Senior ASIC Physical Design Engineer ** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior ASIC Physical Design Engineer_ **Location:** _CA-Santa Clara_ **Requisition ID:**… more
- Broadcom (San Jose, CA)
- …features as well as manage extremely large volumes of internet traffic. As a Senior Physical Design Engineer , the ideal candidate will be responsible for the ... signal and power EM checks. . Methodology & Flow development of Physical Design and Timing Closure. . Interfacing with internal and external teams including … more
- Broadcom (San Jose, CA)
- … methodology , power planning and analysis, timing closure, signal integrity and physical design checks. Participate in large complex design ... you apply.** **Job Description:** Broadcom is lookign for ASIC implementation engineer with demonstrated expertise in multiple disciplines including synthesis, … more
- Broadcom (San Jose, CA)
- …Power-grid and high speed clock constraints and specification. + Good understanding of physical design verification methodology to debug LVS/DRC issues at ... in Electrical Engineering or Computer Engineering with 10+ years of experience in Physical design . + Deep knowledge about industry standards in Physical … more
- Microsoft Corporation (Mountain View, CA)
- …SOCs, cloud accelerators, cloud servers, and clients. We are looking for a Senior Design Verification Engineer to work on leading edge IP (intellectual property) ... work and beyond. We are looking for a **Senior Design Verification Engineer ** to join the team....random stimulus, scoreboards and checkers, and assertions to verify design correctness. + Develop Universal Verification Methodology … more
- Capgemini (Santa Clara, CA)
- …, checking low power implementation, supporting verification team with debug and support physical design teams on timing constraints and other design ... **Location: San Clara, California.** **Job description:** The RTL Engineer performs detailed block design from...with remote teams * Influence tools, flows, and overall design methodology in design construction,… more
- General Motors (Mountain View, CA)
- …passionate engineer to join our team as a Staff ADAS Perception Systems Design Engineer . This is a great opportunity to work on ground breaking technologies! ... on all General Motors programs. As ADAS Perception Systems Design Engineer , a key enabler for General...+ Collaborate with other groups to shape the SW methodology and policy of GM autonomous driving SW +… more
- NVIDIA (Santa Clara, CA)
- We are now looking for an ASIC Design Efficiency Engineer . NVIDIA is seeking extraordinary methodology engineers to design hardware accelerators and ... of the art performance and efficiency. + Understand the design and implementation, develop methodology and infrastructure...the crowd: + Pipeline processor or deep learning accelerator design /architecture experience + Low power or physical … more
- Meta (Sunnyvale, CA)
- **Summary:** Join Meta's Wearable Silicon AMS team as a Digital Mixed Signal Design Engineer and work alongside world-class researchers and engineers to develop ... and augmented reality systems. **Required Skills:** Digital Mixed Signal Design Engineer Responsibilities: 1. Collaborate with AMS...constraints, UPF files, and other collateral for hand-off to physical design 6. Perform RTL power analysis… more
- Cisco (San Jose, CA)
- …focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements ... entire Implementation flow and post silicon validation phases with additional exposure to physical design signoff activities. What You'll Do * Responsible for… more