- NVIDIA (Santa Clara, CA)
- As a Senior Formal Verification Engineer at NVIDIA, you will verify the design and implementation of the industry's leading GPUs. In this position, your ... responsibilities will be to verify the micro-architecture using formal verification tools, define the verification scope, and ensure design correctness. You… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for Formal Verification Engineer to help verify the design and implementation of industry's leading CPUs and other High Performance ... Computing Solutions. As a Formal Verification Engineer , you will play a key role in ensuring the functional correctness and completeness of our next… more
- NVIDIA (Santa Clara, CA)
- The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification . The NVIDIA Clocks ... in industry-standard verification flows like SV constraint random verification , UVM, Formal Verification , Coverage metrics, profiling tools, X prop, etc.… more
- Google (Mountain View, CA)
- …with an emphasis on computer architecture. + Experience in different verification techniques and methodologies including formal , Gate-Level Simulation, Unified ... field, or equivalent practical experience. + 5 years of experience with verification methodologies and languages such as UVM and SystemVerilog. + Experience… more
- Cisco (San Jose, CA)
- …Who You Are The Core Hardware Business Unit is on the lookout for a driven Senior Verification Engineer to join us in developing the next generation of ... * Experience with Forwarding logic/Parsers/P4. * Experience with Veloce/Palladium/Zebu/HAPS. * Formal verification (iev/vc formal ) knowledge. * Domain… more
- Capgemini (Santa Clara, CA)
- **Job Title : Senior ASIC Physical Design Engineer ** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... Timing with SI and OCV, Power, IR and Physical Verification at both block and chip level + Understanding...or Perl or Python + Experience in Synthesis and Formal is a plus + Excellent verbal and written… more
- NVIDIA (Santa Clara, CA)
- …of Automotive quality standards, ASPICE, ISO 26262, ISO 21434 + Hands-on experience with formal verification methods and tools, such as Ada/SPARK and TLA+ + ... world-class Autonomous Vehicles. We are making extensive use of formal methods to automate our workflow and increase the...SW. We are hiring now for the position of Senior System Software Engineer for Hypervisor and… more
- Broadcom (San Jose, CA)
- …to help through congestion resolution and timing closure. Should have experience of formal verification and timing analysis and Eco implementation. Should be ... manage extremely large volumes of internet traffic. As a Senior Physical Design Engineer , the ideal candidate...implementation of blocks and top-level including clock-tree. . Physical verification and timing closure for block and chip-level. .… more
- NVIDIA (Santa Clara, CA)
- …CDR, and offset cancellation + Experience with static timing tools (nanotime, primetime) and formal verification tools + Have a strong background in Perl and ... We are now hiring for a Senior Logic and Digital Circuit Design Engineer...in RTL for mixed-signal blocks; Experience with industry standard verification methodologies, such as UVM + Proven experience with… more
- NVIDIA (Santa Clara, CA)
- …modern C++, build systems, and database. + Experienced with EDA Vendor tools for design, verification and formal analysis. The base salary range is 148,000 USD - ... infrastructure tools used by design engineers for build and verification of architectural, rtl, and gate level designs. As...architectural, rtl, and gate level designs. As a software engineer , you will craft highly efficient software to automate… more
- Siemens Digital Industries Software (Fremont, CA)
- …algorithms and job distribution techniques. + Exposure to Simulation or Formal -based Verification methodologies. **Education** A Bachelor's or Master's degree ... We are seeking a passionate and highly skilled software engineer to join the QuestaSim (Simulation) R&D team at...+ Solve complex software problems in collaboration with a senior group of engineers in a fast-paced and dynamic… more
- NVIDIA (Santa Clara, CA)
- …a lasting impact on the world. We are looking for a motivated CAD Methodology Engineer to join our dynamic and growing team. If you like solving challenging problems ... in asynchronous digital design and verification in a highly multi-functional work environment then join...Deep understanding of static sign-off technologies CDC, RDC and Formal . + Proficiency in one or more scripting languages… more
- Siemens Digital Industries Software (Fremont, CA)
- …stacks like AWS, Azure, Google cloud etc. + Exposure to Simulation or Formal -based Verification methodologies. + Knowledge of Python, ML based techniques and ... chip, board, and system design. We are seeking a passionate and highly skilled software engineer to join the Questa Visualizer Debug R&D team at Siemens EDA. In this… more
- Cisco (San Jose, CA)
- …the world What You'll Do The Core Hardware Business Unit is looking for a motivated Senior Verification engineer /lead to engage in new development of our UCS ... Forwarding logic/Parsers/P4 * Prior experience with Veloce/Palladium/Zebu/HAPS * Prior experience with formal verification (iev/vc formal ) We Are Cisco… more
- Amazon (Cupertino, CA)
- …tools (examples: Cadence, Mentor Graphics, Synopsys, or Others) develop flows for synthesis, formal verification , floor planning, bus / pin planning, place and ... integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and architectures, while ensuring… more
- Siemens Digital Industries Software (Fremont, CA)
- …to SystemVerilog, Verilog, and VHDL. + Exposure to Simulation technologies or Formal -based Verification methodologies is a plus. **Education** : A Bachelor's ... and system design. We are seeking a highly motivated and experienced software engineer with a strong background in AI/ML to join the QuestaSim (Simulation) R&D… more
- Omnicell (Milpitas, CA)
- **Essential Functions:** In order to work effectively as a Software Engineer V, the position is expected to: + **Architect and Drive High-Level Solutions:** Lead the ... of continuous improvement and excellence. + **Strategic Planning:** Work with senior management to align technical initiatives with business strategy, identify and… more
- Amazon (Cupertino, CA)
- …ASIC physical design, and methodologies including synthesis, place and route, STA, IR, formal and physical verification . - Demonstrated level of expertise in PD ... of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new technologies and architectures, while ensuring… more