- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new ... building an environment that celebrates knowledge-sharing and mentorship. Our senior members enjoy one-on-one mentoring and thorough, but kind,...in EE/CS - 5+ years of experience in developing physical design methodology or CAD… more
- Medtronic (Santa Clara, CA)
- …products for the Neuromodulation business. The position responsibilities will focus on design and development of new products to compliment the Interventional Pain ... R&D systems or initiatives related to new technologies or therapies - from design to implementation - while adhering to policies, using specialized knowledge and… more
- Micron Technology, Inc. (San Jose, CA)
- …documentation. + You will lead by example analog functional projects to improve design methodology , collaboration tools, and task automation. + You will define ... problems and shaping strategic decisions, focusing on the analog circuit and system design and NAND yield problem-solving. + You will serve as an alignment authority… more
- Gilead Sciences, Inc. (Foster City, CA)
- …aspirations. Join Gilead and help create possible, together. **Job Description** ** Sr . Quality Engineer - Combination Products, Tech Transfer and Commercial** This ... these new product lines in the commercial stage, starting with collaborating with the design and development team on Design Transfer. We are looking for a… more
- Qualcomm (Santa Clara, CA)
- …along the way. Roles and Responsibilities + Work with chip leads to understand the design methodology and high level requirements in support of design ... **General Summary:** As a CAD Engineer focusing on the methodology and support of RTL design verification,...* Leverages advanced knowledge of computer architecture, micro-architecture, logic design , circuits, and/or physical design … more
- Qualcomm (Santa Clara, CA)
- …Responsibilities:** * Leverages advanced knowledge of computer architecture, micro-architecture, logic design , circuits, and/or physical design to develop ... a CAD Engineer focusing on the DV & Emulation methodology and support, you will work with RTL, architecture,... and support, you will work with RTL, architecture, design , DV, software and silicon verification users. Interfaces with… more
- NVIDIA (Santa Clara, CA)
- …aging, self-heating, thermal impact, IR drop etc. + Collaborate with technology leads, VLSI physical design , and timing engineers to define and deploy the most ... human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive...sophisticated strategies of signing off timing in design for world-class silicon performance. + Develop tools, and… more
- Medtronic (Santa Clara, CA)
- …will be responsible for partnering with Systems Development engineering lead, marketing, design teams, Quality engineers and Program managers to drive meaningful ... design inputs, robust designs and ultimately an efficient and...+ In depth knowledge of process engineering and troubleshooting methodology in a regulated environment (statistics is a plus)… more
- NVIDIA (Santa Clara, CA)
- …EDA tools from Synopsys (DC/FC), Cadence (Genus/Innovus) + Strong understanding of physical design implementation eg: physical synthesis, placement, routing, ... We are looking for a Senior CPU Implementation Methodology Engineer to...out from the crowd: + Prior CPU experience in physical implementation methodology + Proficiency in Perl,… more
- NVIDIA (Santa Clara, CA)
- … Design Engineers, Low Power Engineers, Performance Engineers, Software Engineers, and Physical Design teams to study and implement energy modeling techniques ... energy usage in graphics and AI workloads and make improvements in architecture, design , and power management. What you'll be doing: + Define and implement tools… more
- NVIDIA (Santa Clara, CA)
- … needs to balance high frequency clocks with power, DFT, noise, circuit and physical design constraints. What you'll be doing: + Develop Clock RTL generation ... Methodology engineer with proven experience in high-speed logic design and verification. In order to support high frequency...solutions for supporting high speed Clocking. + Understand the physical aspects of the chip and develop better clock… more
- Stanford University (Stanford, CA)
- …and interpersonal skills will be crucial to success. The chief of data analytics, methodology and integration will be required to: design , develop, optimize, and ... Chief of Data Analytics, Methodology , and Integration **Hoover Institution, Stanford, California, United...integrity of the US research enterprise. This is a senior -level role for a versatile individual with proven leadership… more
- Capgemini (Santa Clara, CA)
- **Job Title : Senior ASIC Physical Design Engineer** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior ASIC Physical Design Engineer_ **Location:** _CA-Santa Clara_ **Requisition ID:**… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. If you ... intelligence. What you'll be doing: + Drive next generation physical design work to achieve best in...of circuits and SPICE, as well as experience in methodology and/or flow development and automation. NVIDIA is widely… more
- Microsoft Corporation (Mountain View, CA)
- …the implementation meets both architectural and micro-architectural intent. + Interface with architecture, physical design (PD), design for test (DFT), and ... Azure cloud servers, clients, and augmented reality. We are looking for a ** Senior Logic Design Engineer** to work in the dynamic Microsoft Artificial… more
- Capgemini (Santa Clara, CA)
- **Job Title:** ** Design Verification Engineer** **Job Location: Santa Clara CA** **Job description:** *Architect and Create verification environments using ... System-Verilog and Universal verification methodology -UVM IPs and SoCs with embedded CPUs and analog...and Gate simulations and resolve them by working with design engineers. * Create low power testcases using UPF… more
- Boehringer Ingelheim (Fremont, CA)
- …live the BI values and promote a positive work environment for others. The Senior Engineer frequently leads the design and execution of complex experiments with ... and unit operations of moderate complexity and will often leverage the expertise of senior team members and their supervisor. ** Sr . Engineer** + Executes and… more