• Sr . SOC / ASIC Physical…

    SpaceX (Sunnyvale, CA)
    Sr . SOC / ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... to make this possible, with the ultimate goal of enabling human life on Mars. SR . SOC / ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're… more
    SpaceX (08/16/24)
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  • Sr . SOC Design Engineer - STA,…

    Amazon (Sunnyvale, CA)
    …advance timing signoff flows (AOCV, POCV Based STA, IR Drop aware STA) into SoC timing signoff flow. - Work for Systems and Architecture, SoC ... STA, Crosstalk Delay and Crosstalk Noise analysis for digital ASIC /SoCs. - Full chip timing constraints development,...Sub-System STA and Signoff for a complex, multi-clock, multi-voltage SoC . - Streamlining the timing signoff criterions,… more
    Amazon (09/11/24)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Design Engineer. NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC 's and GPU's. This ... Craft micro-architecture, implement in RTL, and deliver a fully verified, synthesis/ timing clean design. + Collaborate and coordinate with architects, other… more
    NVIDIA (09/11/24)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    …the clocks design. + Together with other team members, we deliver clock information to SOC verification team, timing and DFT teams. You will use Perl to improve ... today. The Clocks group is looking for a top-notch ASIC engineer to join the team. The Team is...The Team is responsible for crafting all aspects of SOC clocking. The team collaborates with the front end… more
    NVIDIA (08/09/24)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC 's and GPU's. This position offers the ... fully verified design by working closely with verification engineers. + Deliver a synthesis/ timing clean design while working with the physical design team to ensure… more
    NVIDIA (08/07/24)
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  • Senior ASIC Design Engineer…

    NVIDIA (Santa Clara, CA)
    …+ Together with other team members, we deliver clock information to GPU, CPU and SOC verification team, timing and DFT teams. You will use Perl to improve ... today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is...team member, you will be collaborating with other architects, ASIC designers and verification engineers to design high frequency… more
    NVIDIA (09/04/24)
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  • ASIC Design Engineer, Cloud-Scale Machine…

    Amazon (Cupertino, CA)
    …scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ... job responsibilities - integrate multiple subsystems into top level SOC , ensure correct clock/reset/functional/DFT signal routing - As a...signal routing - As a key member of the ASIC design team, you will implement and deliver high… more
    Amazon (07/25/24)
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  • Sr . DDR IP Design Engineer (Silicon…

    SpaceX (Sunnyvale, CA)
    …as necessary to support critical milestones COMPENSATION & BENEFITS: Pay range: ASIC /FPGA Design Engineer/ Senior : $170,000.00 - $230,000.00/per year Your actual ... Sr . DDR IP Design Engineer (Silicon Engineering) at...cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing… more
    SpaceX (07/22/24)
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  • Senior DFT Engineer, Hardware Compute Group

    Amazon (Sunnyvale, CA)
    …design. - Experience in Chip level DFT verification methodology and flow. - Perform SOC /IP DFT Gate-level simulations. - Static timing analysis and DFT related ... latest generation of Echo devices is looking for a Senior DFT Engineer to continue to innovate on behalf...in bringing up ATE test programs and taking complex SOC / ASIC to production. - Experience in working… more
    Amazon (08/04/24)
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  • Senior FPGA Prototyping Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    …through synthesis and place and route. + Improve performance of the prototype, analyze timing and generate bit streams. + Bring up the design on FPGA prototyping ... backend flows of FPGA Prototyping - Synthesis, P&R and Timing closure, with emphasis on Synopsys Protocompiler or Synplify...or Synplify Premier and Xilinx Vivado + Exposure to ASIC design and verification tools (VCS or equivalent, Verdi,… more
    NVIDIA (07/31/24)
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  • Senior Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Hardware Design Engineer for our Tegra group! NVIDIA is seeking passionate Senior Hardware Design Engineers to architect, design ... and verify the world's leading SoC 's and GPU's. This position offers the opportunity to...architects, other designers, pre- and post-silicon verification teams, synthesis, timing and back-end teams to accomplish your tasks. What… more
    NVIDIA (09/10/24)
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  • Senior Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Hardware Design Engineer for our Tegra group! NVIDIA is seeking passionate Senior Hardware Design Engineers to design and verify ... the world's leading SoC 's and GPU's. This position offers the opportunity to...micro-architecture, implement in RTL, and deliver a fully verified, synthesis/ timing clean design. + Support post-silicon validation activities working… more
    NVIDIA (07/19/24)
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  • Senior Digital Circuit Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now hiring for a Senior Logic and Digital Circuit Design Engineer! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in ... as one of the key IPs in many complex SoC . You'll work closely with analog designers and system...define and build constraints for synthesis and drive for timing closure. In addition to RTL design, you'll need… more
    NVIDIA (07/31/24)
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  • Senior Design for Debug Architect…

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Design for Debug (DFD) Architect and Methodology Engineer! NVIDIA is seeking a DFD Architect to implement hardware and software ... solutions to debug world's leading SoC 's and GPU's. This position offers the opportunity to...and/or other silicon visibility tools. + Great understanding of ASIC design flow including RTL design, verification, logic synthesis,… more
    NVIDIA (09/12/24)
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