• ASIC / Rtl Design

    US Tech Solutions (San Jose, CA)
    …PREFERRED EXPERIENCE: * 5-6+ years' experience * Must have proven track record of ASIC design on several production tape-outs. * Experience in Designing RTL ... Write micro-architecture documentation and own major portions of the design and implementation of blocks to meet functional, timing,... block for an SOC. * Experience in integrating ASIC IP into an SOC. * Experience with Arm… more
    US Tech Solutions (10/10/24)
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  • ASIC Design Verification…

    Cisco (San Jose, CA)
    …Bachelor's Degree in EE, CE, or other related field. * 7+ years of related ASIC design verification experience. * Proficient in ASIC verification using ... and review of code and functional coverage. * Ensure RTL quality with qualifying the design with...design in emulation. * Oversee and manage the ASIC bring-up process. Who You Are The Core Hardware… more
    Cisco (10/01/24)
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  • ASIC Digital Design Engineer

    Qualcomm (San Jose, CA)
    …a smarter, connected future for all. As a Qualcomm Digital ASIC Engineer , you will define, model, design , optimize, verify, validate, implement, and document ... Science, Engineering, or related field and 4+ years of ASIC design , verification, validation, integration, or related...power use, and verification or similarly for custom circuit design /layout flow. * Utilizes tools/applications (eg, RTL more
    Qualcomm (09/23/24)
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  • ASIC Engineer , Design

    Meta (Menlo Park, CA)
    …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Micro-architecture development 3. RTL development using Verilog, System Verilog and HLS 4.… more
    Meta (10/09/24)
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  • ASIC Engineer , Design

    Meta (Menlo Park, CA)
    …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration. 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Micro-architecture development. 3. RTL development using Verilog, System Verilog and HLS. 4.… more
    Meta (10/09/24)
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  • Hardware Engineer Intern - ASIC

    IBM (San Jose, CA)
    …Professional Expertise + Experience in ASIC or FPGA logic verification. + Strong FPGA/ ASIC RTL logic design skills. + Experience with programming in C, ... technologists to invent what's next for IBM and the world. As a Hardware Engineer intern, you will work with world-class global researchers focused on design more
    IBM (10/06/24)
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  • ASIC Engineer

    Cisco (San Jose, CA)
    …/lead to engage in new development of our UCS family. You will have an ASIC design and verification background with hands-on experience in RTL verification ... for ASIC bring up Minimum Qualifications * 8+ years ASIC design verification experience with Bachelor's or Master's degree in equivalent experience. *… more
    Cisco (10/01/24)
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  • ASIC Engineer II (Intern) United…

    Cisco (San Jose, CA)
    …understanding of engineering fundamentals and technical problem-solving skills * Familiarity with ASIC design flow, including RTL (Register Transfer Level) ... Knowledge of EDA (Electronic Design Automation) tools used in the ASIC design process is also beneficial. Why Cisco #WeAreCisco, where each person is unique,… more
    Cisco (09/14/24)
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  • Physical Design Engineer

    Cisco (San Jose, CA)
    ASIC Implementation Technical Lead in San Jose, CA with a primary focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design ... activities. What You'll Do You will be part of ASIC physical design Team which is responsible...which is responsible for full Chip physical implementation from RTL to GDSII. As Physical Verification Engineer more
    Cisco (09/14/24)
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  • Design Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …to their limits. This particular position requires the individual to be part of ASIC Design effort of the next generation emulation processors Job Requirements: ... years of related experience; or Master's + Experience in RTL development of complex ASIC /SoC. + Comfortable...the development of complex logic systems. + Aware of ASIC design flow. Experience with design more
    Cadence Design Systems, Inc. (09/19/24)
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  • Principal Design Engineer

    Microsoft Corporation (Mountain View, CA)
    …Integrated Circuits ( ASIC )/SOC designs and expertise in Digital Design including microarchitecture specification development, RTL coding in Verilog/System ... and augmented reality. We are looking for a **Principal Design Engineer ** to work in the dynamic...on Intellectual Property (IP) microarchitecture specification, Register Transfer Level ( RTL ) design , synthesis, and System on Chip… more
    Microsoft Corporation (10/03/24)
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  • Senior Principal Design Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …innovators who want to make an impact on the world of technology. Senior Principal Design Engineer - Systems and Interfaces San Jose Job Description: The Cadence ... (CSG) develops and licenses IP designs for SoC and ASIC systems. This includes high-performance DSPs, CPUs, Interface IP,...CSG Central Applications Engineering team seeks an experienced SoC design engineer to integrate and support Cadence… more
    Cadence Design Systems, Inc. (10/08/24)
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  • Senior Logic Design Engineer

    Microsoft Corporation (Mountain View, CA)
    …servers, clients, and augmented reality. We are looking for a ** Senior Logic Design Engineer ** to work in the dynamic Microsoft Artificial Intelligence System ... on micro-architectural based functions and features. + Be responsible for + Logic design /Register Transfer Level ( RTL ) entry + Design quality, including:… more
    Microsoft Corporation (10/09/24)
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  • 3D IC Solutions Engineer - Package…

    Siemens Digital Industries Software (Fremont, CA)
    …plus. + Working knowledge of IC EDA tools and design methods including: o ASIC design methodology from RTL Synthesis to Physical Implementation phases o ... Siemens EDA is a global technology leader in electronic design automation software. Our software tools enable companies around...RTL Design /Verification, LEC, STA analysis o Integration and validation of… more
    Siemens Digital Industries Software (08/25/24)
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  • Silicon Design Verification Engineer

    Microsoft Corporation (Mountain View, CA)
    The Artificial Intelligence Silicon Engineering team is seeking a **Silicon Design Verification Engineer ** to deliver premium-quality designs once considered ... functions in an extremely efficient manner. We are looking for a **Silicon Design Verification Engineer ** to work in the dynamic Microsoft Artificial… more
    Microsoft Corporation (10/03/24)
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  • Sr. Digital Design Engineer

    Integense (San Jose, CA)
    Integense Micro is disrupting the semiconductor supply chain with innovative ASIC solutions. As an established provider of integrated circuit solutions for the ... by applying a holistic system-level approach combined with creative circuit design , proprietary silicon process technology and materials engineering, to provide… more
    Integense (09/25/24)
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  • Physical Design Methodology Engineer

    quadric.io, Inc (Burlingame, CA)
    …What We Expect: Initiative, Collaboration, Completion Role As a member of our physical design methodology team you will be tasked with developing physical design ... process nodes. Responsibilities + Develop Quadric processor IP implementation scripts from RTL to GDS across multiple advanced process nodes. + Preform test chip… more
    quadric.io, Inc (10/05/24)
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  • Senior Hardware Engineer - Micro-Architect

    quadric.io, Inc (Burlingame, CA)
    …Ph.D. in Electrical or Computer Engineering with a minimum of five years of CPU/GPU/ ASIC front-end design + Proficiency in SystemC, SystemVerilog, or Verilog + ... processor architecture. As a senior member of our chip design team, you will contribute to all stages of...by understanding its applications + Own microarchitecture definition & RTL implementation of the processor in SystemC or SystemVerilog… more
    quadric.io, Inc (08/06/24)
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  • Silicon Engineering Intern, BS/MS, Summer

    Google (Mountain View, CA)
    …in one or more of the following areas: Algorithms and theory, Analog IC design , Architecture/system specification, ASIC design , Data Mining, Digital ... intelligence, Mixed-signal, or Natural language processing, or TensorFlow. As a Silicon Engineer , you will design , develop and deploy consumer hardware. Google's… more
    Google (10/08/24)
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