- Cisco (San Jose, CA)
- …* Bachelor's Degree in EE, CE, or other related field. * 7+ years of related ASIC design verification experience. * Proficient in ASIC verification ... design in emulation. * Oversee and manage the ASIC bring-up process. Who You Are The Core Hardware...Unit is on the lookout for a driven Senior Verification Engineer to join us in developing… more
- Google (Mountain View, CA)
- …Learn more about benefits at Google (https://careers.google.com/benefits/) . + Plan the verification of digital design blocks by understanding the design ... and interacting with design engineers to identify important verification scenarios. + Create and enhance constrained-random verification environments… more
- IBM (San Jose, CA)
- …Expertise + Experience in ASIC or FPGA logic verification . + Strong FPGA/ ASIC RTL logic design skills. + Experience with programming in C, C++ and ... next for IBM and the world. As a Hardware Engineer intern, you will work with world-class global researchers...modules for the AI Accelerator SoC and perform functional verification of design modules. You will be… more
- Qualcomm (San Jose, CA)
- …a smarter, connected future for all. As a Qualcomm Digital ASIC Engineer , you will define, model, design , optimize, verify, validate, implement, and document ... degree in Science, Engineering, or related field and 4+ years of ASIC design , verification , validation, integration, or related work experience. OR Master's… more
- Meta (Menlo Park, CA)
- …applications. The role also involves partnering with Full Stack Software, Hardware, ASIC Design , Verification , Emulation, Pre/Post-Silicon Validation & ... build and scale silicon for data center applications.As an ASIC Engineer in the Silicon Lifecycle Engineering...to guide future improvements. 3. Work directly with the design & verification team to enable a… more
- Meta (Menlo Park, CA)
- …applications. The role also involves partnering with Full Stack Software, Hardware, ASIC Design , Verification , Emulation, Pre/Post-Silicon Validation & ... build and scale silicon for data center applications.As an ASIC Engineer in the Silicon Lifecycle Engineering...to guide future improvements. 3. Work directly with the design & verification team to enable a… more
- Cisco (San Jose, CA)
- …* Be responsible for ASIC bring up Minimum Qualifications * 8+ years ASIC design verification experience with Bachelor's or Master's degree in equivalent ... Hardware Business Unit is looking for a motivated Senior Verification engineer /lead to engage in new development...development of our UCS family. You will have an ASIC design and verification background… more
- Cisco (San Jose, CA)
- …Verilog, simulation, synthesis, timing analysis, and verification . Knowledge of EDA (Electronic Design Automation) tools used in the ASIC design process ... understanding of engineering fundamentals and technical problem-solving skills * Familiarity with ASIC design flow, including RTL (Register Transfer Level) … more
- Google (Mountain View, CA)
- …schematic through layout and verification . + Experience with production-grade design verification including Monte-Carlo corner simulations and EM/IR analysis ... Senior Mixed-Signal ASIC Designer, Project Taara Hardware Engineering Mountain View,...The Taara Project is seeking a Senior Integrated Circuit engineer leading the next generation circuit design … more
- BAE Systems (San Jose, CA)
- …may be available based on position level and/or job specifics. **Senior Principal Design Verification Engineer (Hybrid)** **106128BR** EEO Career Site Equal ... plan and implementing Verilog simulation test cases to verify design functionality. + Build verification environment using...Computer Science + Proficient in SystemVerilog (SV) language for ASIC design , and related FPGA + Knowledge… more
- Microsoft Corporation (Mountain View, CA)
- The Artificial Intelligence Silicon Engineering team is seeking a **Silicon Design Verification Engineer ** to deliver premium-quality designs once considered ... high-performance functions in an extremely efficient manner. We are looking for a **Silicon Design Verification Engineer ** to work in the dynamic Microsoft… more
- Cisco (San Jose, CA)
- …responsible for full Chip physical implementation from RTL to GDSII. As Physical Verification Engineer your main responsibilities will include: * Perform full ... Science, with 7+ year minimum of hands-on experience in ASIC implementation and Physical verification * Prior...Package and floorplan teams to define padring and bump-map design * Background in industry-standard physical verification … more
- Cadence Design Systems, Inc. (San Jose, CA)
- …to their limits. This particular position requires the individual to be part of ASIC Design effort of the next generation emulation processors Job Requirements: ... power devices into complex scalable enterprise grade hardware. The design / verification / physical design...the development of complex logic systems. + Aware of ASIC design flow. Experience with design… more
- Cadence Design Systems, Inc. (San Jose, CA)
- … design of high-speed interfaces. Prior experience of collaborating with Physical Design teams in multiple successful ASIC /IP tapeouts. Knowledge of the ... of technology. As a core member of the PHY Design team, your responsibilities will span across various aspects...your responsibilities will span across various aspects for the ASIC frontend flow, which includes RTL integration, maintain the… more
- Microsoft Corporation (Mountain View, CA)
- …cloud servers, clients, and augmented reality. We are looking for a **Principal Design Engineer ** to work in the dynamic Microsoft Artificial Intelligence System ... + Throughout the program you will be interacting with various teams, including architecture, verification , and physical design , ensuring that the design is… more
- Microsoft Corporation (Mountain View, CA)
- …servers, clients, and augmented reality. We are looking for a ** Senior Logic Design Engineer ** to work in the dynamic Microsoft Artificial Intelligence System ... including microarchitecture specification development, RTL coding in Verilog/System Verilog, design verification collaboration, and CDC/Lint closure + 4+ years… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …innovators who want to make an impact on the world of technology. Senior Principal Design Engineer - Systems and Interfaces San Jose Job Description: The Cadence ... CSG Central Applications Engineering team seeks an experienced SoC design engineer to integrate and support Cadence...+ Develop examples and best practices for SoC system design , verification , and testbenches for CSG IP.… more
- Siemens Digital Industries Software (Fremont, CA)
- …Tk based GUI development is a plus. + Working knowledge of IC EDA tools and design methods including: o ASIC design methodology from RTL Synthesis to ... EDA and MCAD tools that facilitate the architectural planning, physical design / verification , muti-die based electrical, thermal, mechanical stress analysis and… more
- Integense (San Jose, CA)
- …San Diego, or Portland to define project architectures and specifications. + Leading design and verification activities of projects as deemed beneficial. + ... design for power targets. + Understanding and awareness of basic analog design . + Experience with UVM based functional verification of mixed-signal chips +… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Experience on memory subsystem verification and/or performance analysis* Strong knowledge of ASIC flow, RTL design in Verilog, System Verilog and FPGA ... to make an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San Jose, CAJob DescriptionThe Cadence IP team develops… more