- Meta (Menlo Park, CA)
- …entire Silicon Lifecycle to build and scale silicon for data center applications.As an ASIC Engineer in the Silicon Lifecycle Engineering team, you will be part ... to deliver reliable and performant silicon to our applications. **Required Skills:** ASIC Engineer , Infra Silicon Responsibilities: 1. Work across all aspects… more
- Meta (Menlo Park, CA)
- …entire Silicon Lifecycle to build and scale silicon for data center applications.As an ASIC Engineer in the Silicon Lifecycle Engineering team, you will be part ... to deliver reliable and performant silicon to our applications. **Required Skills:** ASIC Engineer , Infra Silicon Responsibilities: 1. Work across all aspects… more
- Qualcomm (San Jose, CA)
- …to help create a smarter, connected future for all. As a Qualcomm Digital ASIC Engineer , you will define, model, design, optimize, verify, validate, implement, ... degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree… more
- Cisco (San Jose, CA)
- …Do The Core Hardware Business Unit is looking for a motivated Senior Verification engineer /lead to engage in new development of our UCS family. You will have an ... ASIC design and verification background with hands-on experience in...issues found during firmware development * Be responsible for ASIC bring up Minimum Qualifications * 8+ years … more
- Cisco (San Jose, CA)
- …you directly if a relevant position opens. Who You'll Work With The ASIC Group works closely with other development teams within Cisco, including marketing, system ... of award-winning communications and network processing silicon/ASICs, Cisco's Core ASIC Group will soon begin development of multiple next-generation designs.… more
- Cisco (San Jose, CA)
- …cross-functional teams, working together to ensure the successful verification of the ASIC throughout its lifecycle. What You'll Do You will contribute to developing ... of design in emulation. * Oversee and manage the ASIC bring-up process. Who You Are The Core Hardware...is on the lookout for a driven Senior Verification Engineer to join us in developing the next generation… more
- Google (Mountain View, CA)
- …+ Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. + 5 years of experience ... with verification methodologies and languages such as UVM and SystemVerilog. + Experience developing and maintaining verification testbenches, test cases, and test environments. Preferred qualifications: + Master's degree or PhD in Electrical Engineering,… more
- IBM (San Jose, CA)
- …technologists to invent what's next for IBM and the world. As a Hardware Engineer intern, you will work with world-class global researchers focused on design and ... engineers. Required Technical and Professional Expertise + Experience in ASIC or FPGA logic verification. + Strong FPGA/ ASIC... ASIC or FPGA logic verification. + Strong FPGA/ ASIC RTL logic design skills. + Experience with programming… more
- Google (Mountain View, CA)
- Senior Mixed-Signal ASIC Designer, Project Taara Hardware Engineering Mountain View, CA This is a fixed-term contract position for 12 months About the Team: Project ... Taara About the role: The Taara Project is seeking a Senior Integrated Circuit engineer leading the next generation circuit design as part of the R&D team developing… more
- Meta (Menlo Park, CA)
- …owning the mechanical design and optimization for new accelerator module and ASIC packages. **Required Skills:** Mechanical Engineer Responsibilities: 1. Engage ... **Summary:** Meta is seeking a Mechanical Engineer to join our Accelerator Design Team. Our custom AI accelerators are leading the industry in capability and… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …to make an impact on the world of technology. The position is part of Palladium ASIC development team . The team is responsible for all the ASICs that go into the ... of the usage modes and debug tools. The Palladium ASIC team has a wide range of expertise from...particular position requires the individual to be part of ASIC Design effort of the next generation emulation processors… more
- BAE Systems (San Jose, CA)
- …of VIP cores Buses, Controllers, PHYs, etc with other logic within ASIC /FPGA Because this role involves a combination of collaborative/in-person and independent ... Computer Engineering, or Computer Science + Proficient in SystemVerilog (SV) language for ASIC design, and related FPGA + Knowledge of ASIC design flows… more
- Meta (Fremont, CA)
- **Summary:** Meta is seeking a versatile Hardware Engineer to join our Compute Hardware team. Our mission is backed by a massive hardware infrastructure. Our ... cutting-edge data centers affecting billions of users. **Required Skills:** Hardware Engineer Responsibilities: 1. Work with local and remote teams and suppliers,… more
- Google (Mountain View, CA)
- Network Software Engineer , Project Taara Software Engineering Mountain View, CA This is a fixed-term contract position for 12 months About the Team: Project ... availablehere. About the Role: Taara is looking to hire a network software engineer to build the next generation operating system for wireless broadband networks.… more
- Cisco (San Jose, CA)
- …Work With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on Design-for-Test. ... activities. What You'll Do You will be part of ASIC physical design Team which is responsible for full...physical implementation from RTL to GDSII. As Physical Verification Engineer your main responsibilities will include: * Perform full… more
- Teradyne (San Jose, CA)
- …Business Unit of Teradyne is looking for a highly-motivated, energetic, technically driven engineer to focus on the development of hardware for memory test systems. ... for signal delivery problems across all memory products at Teradyne. This includes ASIC to board signaling, ASIC to ASIC in a board, and off board signaling… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Design team, your responsibilities will span across various aspects for the ASIC frontend flow, which includes RTL integration, maintain the timing constraint, ... Prior experience of collaborating with Physical Design teams in multiple successful ASIC /IP tapeouts. Knowledge of the IP/SoC level timing closure flow and… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is seeking a Hardware Systems Engineer to join our Release to Production (RTP) team working on new NPI hardware. Our servers and data centers are ... hardware technologies for AI at datacenter scale. Hardware Systems Engineer in RTP work closely with HW/SW co-design teams,...work experience in one or more domains such as: ASIC development (Silicon design or bringup or characterization), compute… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is seeking a versatile Hardware Engineer to join our Accelerator Design team. Our mission is backed by a massive hardware infrastructure. Our ... data centers, affecting billions of users. **Required Skills:** Hardware Engineer (Accelerator Design) Responsibilities: 1. Specify, design, and develop hardware… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is looking for an experienced Silicon Packaging design Engineer for its Ecosystem and Technical Operation team to support the development of custom ... Infrastructure as well as to develop packaging solutions that are optimal for our ASIC roadmap. We are building a competency in Packaging technology to support the… more