- Cisco (San Jose, CA)
- …* Bachelor's degree in Electrical or Computer engineering and 12+ years of ASIC Design experience. * Verilog/System Verilog programming experience. * Interactive ... * Master's degree in Electrical or Computer engineering and 8+ years of ASIC Design experience. * Experience resolving setup and hold timing violations… more
- Cisco (San Jose, CA)
- …Bachelor's Degree in EE, CE, or other related field. * 7+ years of related ASIC design verification experience. * Proficient in ASIC verification using ... and review of code and functional coverage. * Ensure RTL quality with qualifying the design with...design in emulation. * Oversee and manage the ASIC bring-up process. Who You Are The Core Hardware… more
- Google (Mountain View, CA)
- …field, or equivalent practical experience. + 3 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog ... SystemVerilog. + Experience with logic synthesis techniques to improve RTL code, performance and power as well as low-power... code, performance and power as well as low-power design techniques. + Experience with ARM-based SoCs, interconnects and… more
- Meta (Menlo Park, CA)
- …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Micro-architecture development 3. RTL development using Verilog, System Verilog and HLS 4.… more
- Capgemini (San Francisco, CA)
- **Physical Design Engineer ** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the physical chip ... development, executing from the inception of the design ( RTL or gate netlist) through the...**Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - ASIC Physical Design … more
- Meta (Menlo Park, CA)
- …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration. 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Micro-architecture development. 3. RTL development using Verilog, System Verilog and HLS. 4.… more
- Cisco (San Jose, CA)
- …in Electrical Engineering, Computer Science or related degree with 5+ years of ASIC design experience or Masters degree in Electrical Engineering, Computer ... and test plan reviews. * Architect and implement complex RTL designs. * Scope third party IP requirements and...Science or related degree with 3+ years of ASIC design experience * Experience in Verilog/System… more
- Cisco (San Jose, CA)
- …* Bachelor's Degree in Electrical or Computer Engineering with 7+ years of ASIC design experience or Master's Degree in Electrical or Computer Engineering ... micro-architecture specifications and participate in reviews. * Implement Verilog RTL to meet timing, performance, and power requirements. *...with 4+ years of ASIC design experience. * Prior experience working… more
- Meta (Menlo Park, CA)
- …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Micro-architecture development 3. RTL development using Verilog, System Verilog and HLS 4.… more
- Cisco (San Jose, CA)
- …Qualifications * Bachelor's Degree in EE, CE, or other related field with 5+ years of ASIC design verification experience. * 5+ years of related ASIC ... design verification experience. * Proficient in ASIC verification using UVM/System Verilog. * Proficient in verifying complex blocks and/or clusters for ASIC .… more
- Cisco (San Jose, CA)
- …* Be part of the development organization as an ASIC Design Engineer with primary focus on RTL Design * Create micro-architecture specifications and ... participate in reviews * Implement Verilog RTL to meet timing and performance requirements * Help...performance requirements * Help define, evolve, and support our design methodology * Collaborate with the verification team on… more
- Cisco (San Jose, CA)
- … ASIC team can provide. You will work with exceptional talent with vast ASIC design and development expertise. With Cisco being a systems company, you will ... first customer shipments Your Impact You are a diligent Design /SDC Engineer with strong analytical skills and...timing modes. * Option to also do block level RTL design or block or top-level IP… more
- Cisco (San Jose, CA)
- …and be responsible for ASIC bring up Minimum Qualifications: * 7+ years ASIC design verification experience with a bachelor's or master's degree * Prior ... hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various… more
- Cisco (San Jose, CA)
- …/lead to engage in new development of our UCS family. You will have an ASIC design and verification background with hands-on experience in RTL verification ... for ASIC bring up Minimum Qualifications * 8+ years ASIC design verification experience with Bachelor's or Master's degree in equivalent experience. *… more
- Cisco (San Jose, CA)
- …* Bachelor's degree in Electrical or Computer engineering and 15+ years of ASIC Design experience. * Experience with Verilog and System Verilog programming. ... Master's degree in Electrical or Computer engineering and 12+ years of ASIC Design experience. * Experience in Data center/Hyperscaler/AI Networking… more
- Cisco (San Jose, CA)
- …most complex ASICs being developed in the industry. You will work with front-end RTL Design and Verification teams and Architects to understand chip architecture ... in deployment-mode applications. Your Impact You will participate in the ASIC design verification for Cisco high-end switching Products, one of the largest and… more
- Broadcom (San Jose, CA)
- …applications. We are seeking a staff **Digital Front-End Designer** with deep expertise in RTL design , synthesis, and design optimization to drive the ... coding, micro-architecture, and PPA trade-offs to optimize performance, power, and area. ** RTL Design and Micro-Architecture:** + Develop high-quality RTL … more
- Google (Mountain View, CA)
- …field, or equivalent practical experience. + 3 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog ... SystemVerilog. + Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power...with an emphasis on computer architecture. + Experience with ASIC design methodologies for clock domain checks,… more
- Google (Mountain View, CA)
- …in evaluating trade-offs such as speed, performance, power, area. + Good understanding of ASIC design flow including RTL design , verification, logic ... can flourish. We are seeking a highly motivated Hardware Engineer to join our team and contribute to development...+ High performance machine learning accelerator architecture, micro-architecture and RTL design . + Selection and integration of… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …to their limits. This particular position requires the individual to be part of ASIC Design effort of the next generation emulation processors Job Requirements: ... years of related experience; or Master's + Experience in RTL development of complex ASIC /SoC. + Comfortable...the development of complex logic systems. + Aware of ASIC design flow. Experience with design… more