• Sr. Staff Design Verification

    Lightmatter (Mountain View, CA)
    Sr. Staff Design Verification Engineer Lightmatter is a photonic computer company that is redefining what computers and human beings are capable of by ... you should join the team at Lightmatter! We are hiring a Sr. Staff Design Verification Engineer to join our team and help orchestrate the hardware… more
    Lightmatter (10/24/24)
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  • ASIC Design Verification

    Cisco (San Jose, CA)
    …Work With: You will be in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You collaborate closely with ... for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers... verification engineers, designers, hardware and cross functional teams to… more
    Cisco (11/01/24)
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  • Design Verification Infrastructure…

    Capgemini (San Francisco, CA)
    **Job Title: Design Verification Infrastructure Engineer ** **Job Location: Sunnyvale, CA (Remote work is OK)** **Job Description:** **Key Responsibilities:** ... + .Assist the design verification leads to develop software for...towards Intelligent Industry. Capgemini Engineering has more than 55,000 engineer and scientist team members in over 30 countries… more
    Capgemini (10/05/24)
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  • ASIC Design Verification

    Cisco (San Jose, CA)
    …You Are The Core Hardware Business Unit is on the lookout for a driven Senior Verification Engineer to join us in developing the next generation of Silicon One ... in EE, CE, or other related field. * 7+ years of related ASIC design verification experience. * Proficient in ASIC verification using UVM/System Verilog. *… more
    Cisco (10/01/24)
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  • Asic Design Verification

    Broadcom (San Jose, CA)
    …towards Touch Controllers/Wireless Charging Chips and other new initiatives. As a verification engineer , your responsibilities will include: ○ Architect block ... and full-chip verification environments using HVLs and constrained random techniques for...○ Debug RTL and Gate simulations and work with design engineers to verify fixes. ○ Write diagnostics for… more
    Broadcom (11/01/24)
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  • ASIC Design Verification

    Cisco (San Jose, CA)
    …customer shipments. What You'll Do * You will participate in the ASIC design verification for Cisco high-end switching products. * Development of simulation ... related experience * Experience in System Verilog/UVM. * Experience with ASIC design and verification processes, debugging, methodology, and tools. * Experience… more
    Cisco (10/28/24)
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  • Senior Design Verification

    quadric.io, Inc (Burlingame, CA)
    …progress on verification Requirements + At least 5 years of experience in design verification for CPU or GPUs. + Deep knowledge of leading verification ... Collaborate with architects, HW & SW designers to document verification test plans + Implement testbenches using commercial VIPs...drivers, assembly or C++ programs to efficiently test the design + Use coverage metrics to track and communicate… more
    quadric.io, Inc (08/06/24)
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  • Design Verification (DV)…

    Cisco (San Jose, CA)
    …developed in the industry. What You'll Do You will participate in the ASIC design verification and Emulation for Cisco high-end switching products. One of the ... Verification teams and Architects to understand chip architecture and drive design verification requirements. You'll work with SDK and Software teams as part… more
    Cisco (10/30/24)
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  • Hardware Engineer Intern - ASIC…

    IBM (San Jose, CA)
    …to write VHDL/Verilog modules for the AI Accelerator SoC and perform functional verification of design modules. You will be developing tests for functional ... next for IBM and the world. As a Hardware Engineer intern, you will work with world-class global researchers...Professional Expertise + Experience in ASIC or FPGA logic verification . + Strong FPGA/ASIC RTL logic design more
    IBM (10/06/24)
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  • Senior E/E & Semiconductor Engineer - Lead…

    Capgemini (San Francisco, CA)
    **Job role:** **Lead DV IP Verification Engineer ** **Job Location : San Francisco CA / Sunnyvale CA** **Job description:** Architect and Create verification ... **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - Lead DV IP Verification Engineer_ **Location:** _CA-San… more
    Capgemini (09/04/24)
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  • Silicon Verification Engineer 2

    ManpowerGroup (Mountain View, CA)
    …a global technology corporation headquartered in the Pacific NW, is seeking a Silicon Verification Engineer for a REMOTE contract job opportunity. In this role, ... Bench Development to align successfully with this organization. **Job Title: Silicon Verification Engineer ** **Location: Remote | USA** **Pay Range: $35-40/HR on… more
    ManpowerGroup (10/15/24)
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  • Formal Verification Product focused…

    Siemens Digital Industries Software (Fremont, CA)
    …are required + BSEE or equivalent, 10+ years of experience in semiconductor design , verification , and formal verification . EDA Functional Verification ... EDA Business is a global technology leader in electronic design automation software. Our software tools enable companies around.... **Position Overview:** The Product focused AE for Formal Verification will drive and grow Formal Verification more
    Siemens Digital Industries Software (10/25/24)
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  • IC Verification Engineer

    Broadcom (San Jose, CA)
    …plans, Verification Environment, pseudo-random tests, etc. Lead reviews with design /architecture. . Come up with strategies to improve Verification quality ... Architect and Develop scalable and reusable Testbench Environment using the framework of Verification Methodologies. . Develop Test plans for all features of the … more
    Broadcom (11/01/24)
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  • Atlas Graduate Program: Hardware Assisted…

    Siemens Digital Industries Software (Fremont, CA)
    …full breadth of semiconductor and electrical systems solutions including integrated circuit design and verification , PCB design & manufacturing solutions, ... or a related discipline * A basic understanding of semiconductor logic design and verification * Basic skills in a hardware description languages (VHDL, SV, UVM,… more
    Siemens Digital Industries Software (10/25/24)
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  • Physical Design Engineer

    Cisco (San Jose, CA)
    …responsible for full Chip physical implementation from RTL to GDSII. As Physical Verification Engineer your main responsibilities will include: * Perform full ... experience working with Package and floorplan teams to define padring and bump-map design * Background in industry-standard physical verification EDA tools Why… more
    Cisco (10/23/24)
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  • Senior E/E & Semiconductor Engineer - ASIC…

    Capgemini (San Francisco, CA)
    **Physical Design Engineer ** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the physical chip ... Timing with SI and OCV, Power, IR and Physical Verification at both block and chip level *Understanding constraints...**Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - ASIC Physical Design Engineer_ **Location:**… more
    Capgemini (10/16/24)
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  • Senior Design Engineer

    Micron Technology, Inc. (San Jose, CA)
    …will include architecture development and product definition, test plan, system integration and verification . Some RTL design verification of the controller ... class memory solutions. You will collaborate with Micron's various design and verification teams all over the...cost, quality, reliability, time-to-market, and customer satisfaction. As an Engineer - NVE Design at Micron Technology,… more
    Micron Technology, Inc. (10/17/24)
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  • ASIC Digital Design Engineer - WiFi…

    Qualcomm (San Jose, CA)
    …help create a smarter, connected future for all. As a Qualcomm Digital ASIC Engineer , you will define, model, design , optimize, verify, validate, implement, and ... in Science, Engineering, or related field and 4+ years of ASIC design , verification , validation, integration, or related work experience. OR Master's degree in… more
    Qualcomm (09/23/24)
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  • Senior Principal Design Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …innovators who want to make an impact on the world of technology. Senior Principal Design Engineer - Systems and Interfaces San Jose Job Description: The Cadence ... CSG Central Applications Engineering team seeks an experienced SoC design engineer to integrate and support Cadence...+ Develop examples and best practices for SoC system design , verification , and testbenches for CSG IP.… more
    Cadence Design Systems, Inc. (10/08/24)
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