- Broadcom (San Jose, CA)
- …and develop scalable and reusable Testbench environment using the framework of Verification Methodologies. + Drive Test plans for all features for Block/Core/SOC and ... and get to full Functional coverage and bring the Verification to closure + Debug Regression failures, analyze Functional...in an efficient way. + Lead the documentation of verification strategy including Test plans, Verification Environment,… more
- Broadcom (San Jose, CA)
- …please Sign-In before you apply.** **Job Description:** Broadcom is searching for a Physical IC Design Engineer to join the Data Center Solutions Group. This ... the following:** + Execution of Physical Design, Synthesis, Physical Verification , and Timing Closure + Setup and Synthesizing RTL...Layout + Flow and Methodology Development + Collaborating with IC Design RTL Engineers + Must work in person… more
- Broadcom (San Jose, CA)
- …Account, please Sign-In before you apply.** **Job Description:** ASIC/Layout Design Engineer : Oversees definition, design, verification , and documentation for ... pin assignment. + Perform blocks PnR, timing closure, physical verification . + Perform blocks IR/EM analysis. Experience with chip...make it more efficient. + Expertise on low power IC design is desirable. + Good knowledge on physical… more
- Broadcom (San Jose, CA)
- …Candidate Account, please Sign-In before you apply.** **Job Description:** **Job Description: IC Design Engineer ** + Participate in IP level architectural ... and Clock/Reset Domain crossing issues in the design + Collaborate with verification team on test plan development, debugging, and coverage closure + Collaborate… more
- Broadcom (San Jose, CA)
- …with custom routing for high speed interfaces, bump map design , routing and physical verification and tapeout to the foundries. As part of your job you will be ... (3DIC compiler), Mentor Graphics (Calibre) for layout generation, editing and verification + Strong understanding of TSV design, micro-bumps, solder bumps, and… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …who want to make an impact on the world of technology. Senior Principal Design Engineer The Sr Principal Analog IC Designer is responsible for design and ... developing analog/mixed-signal IC circuit blocks, the architecture and initial concept/specification through final verification of conformance to customer… more
- Broadcom (San Jose, CA)
- …compute cores and CPUs. We are seeking a motivated and technically strong engineer to join our team. Job Description: Layout design of digital high-performance ... the blocks with best PPA (power/performance/area) Debug LVS/DRC/ERC errors with verification tool Analyze the trade-offs and performance implications of different… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …technical skills to enable semiconductors companies adopting Cadence solutions and associated IC design methodologies. The Application Engineer will work with ... automation). Job Responsibilities: + Acquire strong technical understanding of the complete IC design/ verification flow with focus on analog design automation +… more
- Capgemini (San Francisco, CA)
- **Position: IC CAD Engineer - Analog Mixed-Signal Flow Automation** **About the job you're considering** We are seeking a skilled ** IC CAD Engineer ** to ... enhancing the CAD infrastructure, automating design flows, and supporting physical verification processes. You will collaborate closely with both analog and digital… more
- Power Integrations (San Jose, CA)
- Job Description: The Senior Failure Analysis Engineer will perform power supply or system level failure analysis to support RMA and internal/external customer ... include, but are not limited to, the following. + Debugging and functionality verification of AC/DC switching power supply modules in various topologies using Power… more
- The Boeing Company (Mountain View, CA)
- …Systems has an exciting opportunity for multiple **ASIC and/or FPGA Design and Verification Engineers** (Entry Level, Associate, or Experienced) to join us as part ... high-integrity, low SWAP-C flight computers. And we're applying the latest digital IC design processes with industry-best tools to enable applications that cut… more
- Renesas (San Jose, CA)
- …volatile/non-volatile memory IP selection, partitioning of hardware/firmware, RTL design, verification , FPGA prototyping, DFT, and IC qualification. ... Principal Digital Engineer Job Description This is an opportunity to...and security function. Renesas is looking for experienced Digital IC Design Engineering candidates that will be working on… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …to make an impact on the world of technology. Job Title: Lead Application Engineer Location: Tampere, Finland Reports to: AE Director Job Overview: This Digital ... IC design and support role offers an opportunity to...Logical Equivalency Checking + Low Power Design Implementation, SDC Verification + Place and Route + Parasitic Extraction, Timing… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …collaborative EDA professionals to deliver the best-in-class next-generation software for physical IC applications. The software engineer will work on complex ... world of technology. Cadence is seeking a Server Farm Engineer to join our team to support, manage, and...to highly complex problems in semiconductor and electronic design, verification , and analysis. We are looking for a recent… more
- Cisco (San Jose, CA)
- …go from concept to production, as well as providing expertise in Solution Verification and ensuring that our products meet Cisco and Industry quality standards. They ... within and across teams. + Participate in design reviews and verification processes to ensure compliance with Cisco standards and customer requirements.… more
- Broadcom (San Jose, CA)
- …a Candidate Account, please Sign-In before you apply.** **Job Description:** **Design Automation Engineer ** This position is part of a team tasked with the support ... of IC Designs for IPs and ASIC designs. Commitment to...products and associated IPs. This role involves + Physical verification runset support and development + Providing guidance to… more
- General Motors (Mountain View, CA)
- …of our vehicle displays hardware. In this role, the Senior Hardware Design Engineer - Display Development will be responsible for the technical design & development ... layout, bring-up, debug, signal integrity and power integrity (SI/PI), design verification test (environmental and EMC), to manufacturing support and production… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …algorithms to extremely complex problems in semiconductor and electronic design, verification , and analysis. With its Sigrity platform, Cadence is the leader ... in providing software for IC package physical design and for analyzing power integrity,...Sigrity R&D team is looking for a talented software engineer who is ready to make a significant impact… more
- Cisco (San Jose, CA)
- …plans, for automating tests and debugging. + Coordinate and participate in verification processes to ensure products meet Cisco standards. + Support system ... tools such as Cadence Concept and Allegro. + Experienced in IC component qualification and reliability failure modes. **Preferred Qualifications** + Development… more
- Broadcom (San Jose, CA)
- …working on initial floor plan. 5). Develop Verilog RTL. design verification support, logic synthesis, physical implementation constraints, static timing analysis. ... design and excellent academic standing. 2). Must have in-depth knowledge of IC technology, ASIC design flows, EDA tools and Physical design considerations. 3).… more