- Cadence Design Systems, Inc. (San Jose, CA)
- …flows, Extraction, Power, EMIR and/or physical design and ensure integrity of delivered solutions . Individual should be able to efficiently work with Cadence R&D to ... constraints, advanced OCV/SOCV concepts, derates, PBA timing, Distributed, Concurrent and Hierarchical STA flows. . Work efficiently with R&D and customer to enable… more
- Cisco (San Jose, CA)
- …switching portfolio. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing and testing some of the most complex ASICs ... ECO tasks. * Your role may include extraction and STA flow development, convergence strategies, and correlation between PNR,...this team, you'll be working closely with the timing lead on backend timing signoff, including CDC checks, static… more
- Broadcom (San Jose, CA)
- …Broadcom's ASIC Product Division is seeking candidates for HBM/DDR/SERDES Verification Lead Engineer position at our San Jose, California Development ... seeking a highly skilled HBM and SerDes DFT Verification Engineer to join our dynamic team. In this role,...drive innovation within the team. + Working closely with STA and DI Engineers design closure for test +… more
- DoorDash (San Francisco, CA)
- …at DoorDash. About the Role DoorDash is looking for a Sta ff Software Engineer ,Data to be a technical lead and help architect and scale our data reliability, ... foundation of DoorDash success. The Data Engineering team builds database solutions for various use cases including reporting, product analytics, marketing… more
- Broadcom (San Jose, CA)
- …you apply.** **Job Description:** **Job Description:** + ASIC implementation engineer with demonstrated expertise in multiple disciplines including synthesis, design ... place and route, clock methodology, power planning and analysis, timing closure, STA , signal integrity and physical design checks. + Participate in large complex… more
- Cisco (San Jose, CA)
- …switching portfolio. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing and testing some of the most complex ASICs ... Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus...and reviews for chip tape out, including test coverage, STA . * Prior experience pre-silicon DFT implementation and verification… more