• Senior FPGA / ASIC

    Cadence Design Systems, Inc. (San Jose, CA)
    …a deep technical knowledge and understanding of digital and mixed-signal verification including logic simulation, formal property analysis, protocol verification ... campaigns externally with customers. + Must have a knowledge of AI/ML verification methods and functional safety/security/radhard verification . + Must have… more
    Cadence Design Systems, Inc. (09/24/24)
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  • Sr Architect - ASIC

    GE HealthCare (Palo Alto, CA)
    …with System Verilog and VHDL code to understand FPGA -based designs; familiar with transitioning FPGA solutions to ASIC * Scope and define ASIC test and ... **Job Description Summary** This Senior Architect position will be responsible for guiding...Resonance (MR) systems. The successful candidate will interface with ASIC simulation & design teams, and Hardware Subsystem teams… more
    GE HealthCare (07/21/24)
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  • Senior Principal Design Verification

    BAE Systems (San Jose, CA)
    …Integration of VIP cores Buses, Controllers, PHYs, etc with other logic within ASIC / FPGA Because this role involves a combination of collaborative/in-person and ... Computer Science + Proficient in SystemVerilog (SV) language for ASIC design, and related FPGA + Knowledge...be available based on position level and/or job specifics. ** Senior Principal Design Verification Engineer (Hybrid)** **106128BR**… more
    BAE Systems (10/03/24)
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