- Broadcom (San Jose, CA)
- …before you apply.** **Job Description:** Broadcom is seeking a highly experienced and accomplished Principal ASIC Chip Lead to lead the development of ... This key role requires a deep, end-to-end understanding of the entire ASIC architecture, design, and verification flow-from initial concept and RTL development… more
- Broadcom (San Jose, CA)
- …ASICs in almost all major segments of the Semiconductor industry, including AI. Our ASIC products division is looking for a senior engineer to guide Customer teams ... you will be required to do the following:** + Manage external customer ASIC programs from inception to finish, including RFQs, technology and IP collaterals, design,… more
- Meta (Sunnyvale, CA)
- **Summary:** Engineers with experience in HW emulation and prototyping required to build ASIC /System on Chip (SoC) and IP for data center applications. ... **Required Skills:** ASIC Engineer, Emulation Responsibilities: 1. Deliver high-quality emulation and...ensure model accuracy and support pre-silicon validation efforts 3. Lead the development and adoption of best-in-class emulation methodologies… more
- Amazon (Cupertino, CA)
- …US, Europe, Singapore, and Japan, and customers across all industries. Custom SoCs (System on Chip ) live at the heart of AWS Machine Learning servers. As a member of ... rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies...validation teams, and synthesis, timing, and back-end experts * Lead and Design to meet requirements or solve a… more
- Amazon (Sunnyvale, CA)
- …part of Amazon Leo's sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites and Amazon gateways. ... and report progress to the program . Participate in the validation of ASIC implementations in Verilog/SystemVerilog . Run formal verification of complex blocks to… more
- Cisco (San Jose, CA)
- …**Your Impact:** You will be in the Silicon One development organization as an ASIC Implementation Technical Lead with a primary focus on Design-for-Test. You ... Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the...crafting groundbreaking next generation networking chips. You will help lead to drive the DFT and quality process through… more
- Capgemini (San Francisco, CA)
- …next-generation technologies, build executive-level relationships, and deliver transformative solutions in ASIC chip design and semiconductor services. If you ... **About the job you're considering** Are you ready to lead the charge in shaping the future of semiconductor...experience in semiconductor services sales, with a focus on ASIC chip design or engineering services. +… more
- Cisco (San Jose, CA)
- …You will be in the Silicon One development organization as a senior DFT verification lead in San Jose, CA. You will work with Front-end RTL teams, backend physical ... design teams to understand chip architecture and drive high-quality DFT verification. **Key Essential Functions:** + Responsible for thorough test planning and… more
- Google (Fremont, CA)
- …qualifications:** + 15 years of experience in Application-Specific Integrated Circuit/System on Chip ( ASIC /SoC) design, with a focus on both digital logic ... Senior Silicon Bringup and Test Lead , Raxium _corporate_fare_ Google _place_ Fremont, CA, USA...the job** We are seeking a Silicon Pre-to-Post Validation Lead with experience in writing verilog code to join… more
- Google (Sunnyvale, CA)
- …review, and finalize agreements with external vendors and partners. + Expertise in ASIC or chip design including architecture definition, RTL coding (eg, ... or sourcing management. + 3 years of experience managing GPU, custom ASIC , or High-Performance Compute (HPC) hardware supply chains. **Preferred qualifications:** +… more
- Amazon (Sunnyvale, CA)
- …a Sr. RTL Design Engineer - Wireless Modem within a high performance ASIC design team. This team is using industry leading methodologies to develop proprietary ... Leo's sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites...architects and system engineers to drive hardware micro-architecture. - Lead design of 1 or more DSP data path… more
- Cisco (San Jose, CA)
- …will drive innovation in advanced packaging technology and quality for Cisco's cutting-edge ASIC and silicon photonic products. Your Impact You will operate at the ... a technical leader in advanced packaging technology (2.5D/3D, TSV, MCM, flip- chip , heterogenous integration). Oversee various aspects such as package assembly,… more
- Broadcom (San Jose, CA)
- …**Job Description:** Broadcom's CSG division is seeking candidate for a DFT lead position. The successful candidate will be responsible for leading most complex ... and cutting edge network switching ASIC DFx (Design for Test/debug & manufacturability) from DFT...is a plus + Experience or familiarity in back-end chip design, Timing, CDC flows is a plus +… more
- Cisco (San Jose, CA)
- …optical communications products. We optimize design that will integrate into the ASIC . Our team interacts with other Acacia groups including digital/DSP design, ... and productize ultra-deep sub-micron-based CMOS products. * You will lead efforts for a large block on a complex... efforts for a large block on a complex chip , mentor team members and track deliverables, participate in… more
- Broadcom (San Jose, CA)
- …Switching Group (CSG) is at the forefront of developing large and integrated system-on- chip (SoC) devices for various market segments from SMB to Datacenter and ... schematics and PCB layout, board bring-up, and customer support. **Responsibilities:** + Lead the development of complex PCB system designs, from specification to… more