- Amazon (Cupertino, CA)
- … design quality and making the right trade-offs. Key job responsibilities As an ASIC Design Engineer , you will: * Develop and implement high-performance, ... scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience… more
- Capgemini (San Francisco, CA)
- **Physical Design Engineer ** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the physical chip ... **Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - ASIC Physical Design ...**Title:** _Senior E/E & Semiconductor Engineer - ASIC Physical Design Engineer_ **Location:** _CA-San Francisco_… more
- Cisco (San Jose, CA)
- …You'll Work With: You will be in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You collaborate closely ... hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various… more
- Capgemini (San Francisco, CA)
- **Job Title: ASIC Design Verification Infrastructure Engineer (Modern Python experience is must)** **Job Location: Sunnyvale, CA (Remote work is OK)** **Job ... by Capgemini. **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _ASIC Design Verification Engineer (with modern Python programming)_ **Location:**… more
- Capgemini (San Francisco, CA)
- **Job Title : Senior ASIC Physical Design Engineer ** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... by Capgemini. **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior ASIC Physical Design Engineer_ **Location:** _CA-Santa Clara_ **Requisition… more
- Google (Sunnyvale, CA)
- …with a specific focus on TPU architecture and its integration within AI/ML-driven systems. As a ASIC Design Verification Engineer , you will be part of a team ... or PhD in Electrical Engineering. + 6 years of experience in design verification. + Experience with industry-standard simulators, revision control systems and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. As a Design Verification Engineer , you will be ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Develop… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is seeking an ASIC Design Engineer Intern to join our Infrastructure organization. Our servers and data centers are the foundation upon ... ASIC engineers to build "Green" data center accelerators. **Required Skills:** ASIC Engineer Intern, Design Responsibilities: 1. Participate in… more
- Meta (Menlo Park, CA)
- …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge machine learning ASICs, capable of world class… more
- Meta (Menlo Park, CA)
- …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration. 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge ASICs in fields such as machine learning, video… more
- Meta (Sunnyvale, CA)
- …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Micro-architecture development. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge machine learning ASICs, capable of world class… more
- Meta (Menlo Park, CA)
- …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge ASICs in fields such as machine learning, video… more
- Meta (Sunnyvale, CA)
- …efficient System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure organization. We are looking for individuals with experience in backend… more
- Cisco (San Jose, CA)
- …the lab. Who You'll Work With You will work with exceptional talent with vast ASIC design and development expertise. With Cisco being a systems company, you will ... degree in Electrical or Computer engineering. * 8+ years of ASIC Design experience. * Excellent Verilog/System Verilog programming skills. * Possesses… more
- Cisco (San Jose, CA)
- …the lab. Who You'll Work With You will work with exceptional talent with vast ASIC design and development expertise. With Cisco being a systems company, you will ... degree in Electrical or Computer engineering. * 4+ years of ASIC Design experience. * Excellent Verilog/System Verilog programming skills. * Possesses… more