• ASIC Design Engineer

    Google (Mountain View, CA)
    …field, or equivalent practical experience. + 3 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or ... techniques to improve RTL code, performance and power as well as low-power design techniques. + Experience with ARM-based SoCs, interconnects and ASIC more
    Google (12/10/24)
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  • ASIC Design Engineer

    Amazon (Cupertino, CA)
    design quality and making the right trade-offs. Key job responsibilities As an ASIC Design Engineer , you will: * Develop and implement high-performance, ... Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of thousands...rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze… more
    Amazon (12/23/24)
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  • ASIC Design Engineer

    Amazon (Cupertino, CA)
    …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and ... management of Compute, Database, Storage, Internet of Things (Iot), Platform , and Productivity Apps services in AWS, including support...signal routing - As a key member of the ASIC design team, you will implement and… more
    Amazon (12/19/24)
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  • ASIC Power Engineer , Cloud-Scale…

    Amazon (Cupertino, CA)
    …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and ... Description Amazon Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of thousands of businesses… more
    Amazon (11/16/24)
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  • Design Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …to their limits. This particular position requires the individual to be part of ASIC Design effort of the next generation emulation processors Job Requirements: ... all the ASICs that go into the Palladium emulation platform which is an industry leading emulation platform...the development of complex logic systems. + Aware of ASIC design flow. Experience with design more
    Cadence Design Systems, Inc. (12/19/24)
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  • Hardware Engineer (Accelerator…

    Meta (Menlo Park, CA)
    …Hardware Engineer (Accelerator Design ) Responsibilities: 1. Specify, design , and develop hardware and platform solutions with leading-edge ASICs, ... **Summary:** Meta is seeking a versatile Hardware Engineer to join our Accelerator Design ...Lead the bring-up, validation, and launch of module and ASIC hardware. 4. Support hyper-scale deployment and obtain learning… more
    Meta (11/26/24)
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  • Silicon Packaging Design Engineer

    Meta (Menlo Park, CA)
    **Summary:** Meta is looking for an experienced Silicon Packaging design Engineer for its Ecosystem and Technical Operation team to support the development of ... create as part of a world-class engineering team. **Required Skills:** Silicon Packaging Design Engineer Responsibilities: 1. Perform package design for… more
    Meta (10/18/24)
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  • Physical Design Engineer , Annapurna…

    Amazon (Cupertino, CA)
    …handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new ... support the development and management of Compute, Database, Storage, Platform , and Productivity Apps services in AWS, including support...3yrs in EE/CS - 4+ years of experience in ASIC Physical Design from - RTL-to-GDSII in… more
    Amazon (11/01/24)
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  • Sr. Physical Design Methodology…

    Amazon (Cupertino, CA)
    …handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze ... Proficient in programming/scripting languages (Perl, Python, C++) - Solid understanding of ASIC physical design , and methodologies including synthesis, place and… more
    Amazon (10/18/24)
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  • Analog Mixed Signal System Engineer

    Meta (Menlo Park, CA)
    …relevant technical field, or equivalent practical experience 6. 10+ years experience with analog design 7. Experience with ASIC design and tape-out cycles 8. ... Meta is seeking an experienced Analog Mixed Signal System Engineer to join our Platform HW team,...and bring-up of parallel links 2. Work closely with ASIC and SI teams to close links using Matlab… more
    Meta (12/05/24)
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  • Firmware Development Engineer

    Broadcom (San Jose, CA)
    …a Candidate Account, please Sign-In before you apply.** **Job Description:** Broadcom's ASIC Product Division (APD) is focused on enabling customers to develop ... Development Engineer_ will be part of a cross functional design and validation team. The successful candidate will be...IP, which are used broadly in our custom silicon ASIC products. This individual must be highly motivated and… more
    Broadcom (12/03/24)
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  • Software Dev Engineer - AI/ML, AWS Neuron…

    Amazon (Cupertino, CA)
    engineer , machine learning engineer , runtime engineer , performance engineer and ML chip accelerator, ASIC , physical designs, SDE in Test. Because ... storage with scalable NVMe. As an SDE ML Apps Engineer , you will work alongside Research Engineers and Applied...science components, including deep learning models that power our platform . Our platform enables non-tech-savvy customers to… more
    Amazon (11/16/24)
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  • Technologist - Analog/Mixed-Signal CAD Development…

    Western Digital (San Jose, CA)
    …for the EDA design environments with focus on analog / mixed signal ASIC design in advanced nodes. + Solid understanding of PDK's, effectively manage PDK ... libraries, collaterals and drive migration of design environments for incremental releases. + Development of Calibre...and validation. + Experience with Cadence custom IC Virtuoso platform to create layout test structures, to validate verification… more
    Western Digital (11/16/24)
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  • Systems Integration Engineer

    Meta (Fremont, CA)
    **Summary:** The Systems Integration Engineer (SIE) is responsible for the successful Integration of new hardware platforms & new infrastructure technologies into ... the data center. This includes leading the system design for serviceability (DFS) requirements development, implementation along with validating new data center… more
    Meta (10/18/24)
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  • Lead C++ Software Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …on synthesis / technology mapping. + Develop the EDA automation flow for the platform with other engineers. + Write Design Specifications and Unit Tests for ... impact on the world of technology. We are looking for an exceptional C++ software engineer to join the Protium Software Development Team to d evelop and enhance the… more
    Cadence Design Systems, Inc. (12/31/24)
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  • Senior Power Engineer , Platforms,…

    Google (Sunnyvale, CA)
    …equivalent practical experience. + 4 years of experience working in a power converter design including DC/DC converter design and board bring up and debugging ... analyzing and organizing data. + Experience in power system design . + Knowledge of power converter modeling and simulation....on projects and evaluate new technologies. As a Power Engineer in Technical Infrastructure, you will play a key… more
    Google (01/08/25)
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  • Senior Power & Performance Engineer

    Microsoft Corporation (Sunnyvale, CA)
    …performance monitors and post-silicon SOC power and performance tuning. + Familiarity with ASIC power analysis, low power design and power optimization. + ... 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure,...We are looking for a **Senior Power and Performance Engineer ** to join the team. **Responsibilities** + Work with… more
    Microsoft Corporation (12/31/24)
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  • Senior SoC Functional Modeling Engineer

    Amazon (Cupertino, CA)
    …for use by internal partner teams. We're looking for a Senior SoC Modeling Engineer to join the team and deliver new functional models, infrastructure, and tooling ... or infrastructure components, testing, and debug - Work closely with architecture, RTL design , design verification, emulation, and software teams - Innovate on… more
    Amazon (10/18/24)
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  • Production Systems Engineer , AI Systems

    Meta (Menlo Park, CA)
    …Systems Engineer , AI Systems Responsibilities: 1. Support new MTIA platform introduction into Meta fleet by working closely with post-silicon validation team ... **Summary:** Meta is seeking a Systems Engineer to join our Release to Production (RTP)...experience in one or more domains such as: Network ASIC development (Silicon design or bring up… more
    Meta (11/06/24)
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  • Signal Integrity Engineer

    Meta (Menlo Park, CA)
    **Summary:** Meta is seeking an experienced Signal Integrity Engineer to join our Platform HW Interconnect team, focusing on Power Integrity and Signal Integrity ... for our MTIA (Meta Training Inference ASIC ) reference module and next-generation System on Wafer (SOW)...module and next-generation System on Wafer (SOW) reference module design . **Required Skills:** Signal Integrity Engineer Responsibilities:… more
    Meta (10/12/24)
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