- Meta (Sunnyvale, CA)
- … DFT EDA tools and IEEE standards (1149, 1500, 1687). **Required Skills:** ASIC Engineer , DFT Responsibilities: 1. Develop and implement DFT ... **Summary:** Meta is hiring ASIC DFT Engineers within our Infrastructure organization to work on Design for Test ( DFT ) methodologies, implementation, and… more
- Broadcom (San Jose, CA)
- …San Jose, California Development Center. We are seeking a highly skilled HBM and SerDes DFT Verification Engineer to join our dynamic team. In this role, you ... Account, please Sign-In before you apply.** **Job Description:** Broadcom's ASIC Product Division is seeking candidates for HBM/DDR/SERDES Verification Lead… more
- Cisco (San Jose, CA)
- …Work With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on Design-for-Test. ... physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a...networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow… more
- Broadcom (San Jose, CA)
- …switching ASIC DFx (Design for Test/debug & manufacturability) from DFT architecture, to implementation, verification, timing closure, ATE pattern bringup. . You ... you apply.** **Job Description:** Broadcom's CSG division is seeking candidate for a DFT lead position. The successful candidate will be responsible for leading most… more
- Meta (Sunnyvale, CA)
- …entire Silicon Lifecycle, to build and scale silicon for data center applications.As an ASIC Engineer in the Infra Silicon Characterization team, you will be ... ASIC solutions for Meta's data center applications. **Required Skills:** ASIC Engineer - Infra Silicon Characterization Responsibilities: 1. Work across… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At...CMOS analog circuit and physical design + Knowledge of DFT /Scan/MBIST/LBIST and understanding of their impact on physical design… more
- Cisco (San Jose, CA)
- …on performing project tasks and problem solving. * Collaborate with the verification, PD, DFT , Package and SW teams to develop next generation AI Switching ASIC ... * Bachelor's degree in Electrical or Computer engineering and 15+ years of ASIC Design experience. * Experience with Verilog and System Verilog programming. *… more
- Cisco (San Jose, CA)
- …you directly if a relevant position opens. Who You'll Work With The ASIC Group works closely with other development teams within Cisco, including marketing, system ... of award-winning communications and network processing silicon/ASICs, Cisco's Core ASIC Group will soon begin development of multiple next-generation designs.… more
- Amazon (Cupertino, CA)
- …scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ... integrate multiple subsystems into top level SOC, ensure correct clock/reset/functional/ DFT signal routing - As a key member of...signal routing - As a key member of the ASIC design team, you will implement and deliver high… more
- Cisco (San Jose, CA)
- …service provider networks. Cisco's silicon team provides a unique experience for ASIC engineers by combining the resources offered by a large multi-geography silicon ... breadth of growth opportunities that working in a smaller ASIC team can provide. You will work with exceptional...customer shipments Your Impact You are a diligent Design/SDC Engineer with strong analytical skills and a deep understanding… more
- Amazon (Sunnyvale, CA)
- …by running and tracking results of front-end tools including: Synthesis, Lint (RTL, DFT , UPF), Power Analysis and STA - Work with pre-silicon verification teams to ... assist in defining test-plans/test-benches - Work with post-silicon validation teams to define and execute on test-plans - Write high quality documents to guide a scalable team Basic Qualifications - Bachelor's degree in Electrical Engineering, Communications… more
- Amazon (Cupertino, CA)
- …to improve physical design flows and methods * Collaborate with RTL, DFT designers to ensure high quality design implementation Basic Qualifications - Enrolled ... in a Bachelors' degree program or higher in Electrical Engineering, Computer Engineering, or a related field with a graduation conferral date between December 2025 and September 2026 - Scripting internship/project experience with Python, Perl or equivalent -… more
- Broadcom (San Jose, CA)
- …Description:** Technical Lead for Physical Designs Are you a versatile, senior engineer capable of leading external and internal cross-functional teams? Do your ... resident expert in areas such as physical design, STA, DFT , and packaging? Have you taped out so many...range of products that keep the globe connected. Our ASIC products division is looking for senior, physical design… more
- Cisco (San Jose, CA)
- …Work With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on Design-for-Test. ... physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a...activities. What You'll Do You will be part of ASIC physical design Team which is responsible for full… more
- SpaceX (Sunnyvale, CA)
- …as necessary to support critical milestones COMPENSATION & BENEFITS: Pay range: ASIC /FPGA Design Engineer /Senior: $170,000.00 - $230,000.00/per year Your actual ... Sr. DDR IP Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX...cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing… more
- Google (Sunnyvale, CA)
- …in test engineering or product engineering. + Experience in Application-Specific Integrated Circuit ( ASIC ) or SoC DFT test development, bring-up, or debug for ... cross-functional teams. + Own IP-level test development for Design for testing ( DFT ) structural tests, functional tests, or eFuse programming. + Support Chip-level … more
- Amazon (Sunnyvale, CA)
- …the world. Come work at Amazon! The Role: As Senior Silicon ATE Test Engineer , you will engage with an experienced cross-disciplinary staff to conceive and design ... Teradyne and Advantest equipment. Convert test patterns from the DFT team into tester-suitable formats (eg ATP). Run test...vector parameters to ensure timing and repeatability. Work with ASIC design teams ensure the test equipment and processes… more
- Google (Mountain View, CA)
- …+ Knowledge of high performance and energy efficient design techniques. + Knowledge of ASIC Verification or DFT . Be part of a diverse team that pushes ... with an emphasis on computer architecture. + Experience with ASIC design methodologies for clock domain checks, reset checks...reset checks and low power design. + Experience in ASIC design flows and methodologies. + Domain knowledge in… more
- Google (Sunnyvale, CA)
- …+ Experience with formal verification methods and design for testability ( DFT ) techniques. + Understanding of digital design fundamentals, including synchronous and ... design and implementation of global communication busses, and integration of complex ASIC designs. This is a cross-functional and central role that will require… more
- Insight Global (San Jose, CA)
- Job Description Insight Global is seeking a experienced Test Engineer to join a large networking company in the Bay Area. You will be joining the Silicon Operations ... post silicon lifecycle. You will be partnering with the ASIC team to bring up tests, characterize units and...development and debug to provide insights to production and DFT . Salary expectations for this role range from $25-28/hour… more