- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. As a Design Verification Engineer , you ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Develop… more
- Google (Sunnyvale, CA)
- …with a specific focus on TPU architecture and its integration within AI/ML-driven systems. As a ASIC Design Verification Engineer , you will be part of a ... emphasis on computer architecture, or a related field. + 6 years of experience in design verification . + Experience in power aware verification , gate level… more
- Capgemini (San Francisco, CA)
- **Job Title: ASIC Design Verification Infrastructure Engineer (Modern Python experience is must)** **Job Location: Sunnyvale, CA (Remote work is OK)** ... US by Capgemini. **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _ASIC Design Verification Engineer (with modern Python programming)_… more
- Cisco (San Jose, CA)
- …Who You'll Work With: You will be in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You collaborate ... for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers...closely with verification engineers, designers, hardware and cross-functional teams to verify… more
- Cisco (San Jose, CA)
- …* Bachelor's Degree in EE, CE, or other related field. * 7+ years of related ASIC design verification experience. * Proficient in ASIC verification ... design in emulation. * Oversee and manage the ASIC bring-up process. Who You Are The Core Hardware...Unit is on the lookout for a driven Senior Verification Engineer to join us in developing… more
- Cisco (San Jose, CA)
- …to first customer shipments. What You'll Do * You will participate in the ASIC design verification for Cisco high-end switching products. * Development ... of related experience * Experience in System Verilog/UVM. * Experience with ASIC design and verification processes, debugging, methodology, and tools. *… more
- Cisco (San Jose, CA)
- …* Bachelor's Degree in EE, CE, or other related field. * 5+ years of related ASIC design verification experience. * Proficient in ASIC verification ... hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers, the Public… more
- Broadcom (San Jose, CA)
- …power efficiency._** **_We are looking for highly skilled and efficient Constrained Random Design Verification engineers that want to verify new designs that can ... architecture teams to develop leading edge products. All aspects of Design Verification will be involved, along with opportunities for technical leadership._**… more
- Cisco (San Jose, CA)
- …some of the most complex ASICs being developed in the industry. Your Impact As ASIC Verification Engineer in The Core Hardware Business Unit, you will ... *Master's degree with 3+ years in high-performance ASIC verification . *Experience with ASIC design and verification methodologies and flows.… more
- Cisco (San Jose, CA)
- …the ASIC in deployment-mode applications. Your Impact You will participate in the ASIC design verification for Cisco high-end switching Products, one of ... teams and Architects to understand chip architecture and drive design verification requirements. You'll work with SDK...Verilog / UVM programming * 4+ Years post graduate ASIC Verification processes, methodologies, flows and tools… more
- Meta (Sunnyvale, CA)
- …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Static Verification Responsibilities: 1. ... practical experience. 9. 5+ years of experience in static verification tools 10. Experience with Lint, Clock Domain &...Integration (Clocking, Reset, PLL, etc) 13. Knowledge of front-end ASIC flows 14. Experience with RTL design … more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... this possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is seeking an ASIC Design Engineer Intern to join our Infrastructure organization. Our servers and data centers are the foundation upon ... efficiently. You will have an opportunity to participate in design and verification of advanced IPs using...engineers to build "Green" data center accelerators. **Required Skills:** ASIC Engineer Intern, Design Responsibilities:… more
- Capgemini (San Francisco, CA)
- **Physical Design Engineer ** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the physical chip ... Timing with SI and OCV, Power, IR and Physical Verification at both block and chip level *Understanding constraints...**Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - ASIC Physical Design … more
- Cisco (San Jose, CA)
- …* Bachelor's Degree in Electrical or Computer Engineering with 7+ years of ASIC design experience or Master's Degree in Electrical or Computer Engineering ... functional coverage. * Help define, evolve, and support our design methodology. * Collaborate with the verification ...with 4+ years of ASIC design experience. * Prior experience working… more
- Cisco (San Jose, CA)
- …ASICs being developed in the industry. Your Impact You will collaborate with architects, ASIC front-end and Design Verification teams to understand chip ... * Analyze code coverage and provide feedback to the verification team to achieve coverage closure. * Perform LINT...Computer Science or related degree with 5+ years of ASIC design experience or Masters degree in… more