- Meta (Sunnyvale, CA)
- …efficient System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure organization. We are looking for individuals with experience in backend… more
- Capgemini (San Francisco, CA)
- ** Physical Design Engineer ** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the ... PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - ASIC Physical Design Engineer_ **Location:** _CA-San Francisco_ **Requisition ID:** _077101_ more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is ... possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging… more
- Capgemini (San Francisco, CA)
- **Job Title : Senior ASIC Physical Design Engineer ** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... US by Capgemini. **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior ASIC Physical Design Engineer_ **Location:** _CA-Santa Clara_… more
- Amazon (Cupertino, CA)
- …you - come build the future with us! Key job responsibilities * Perform physical design for Amazon's machine learning custom silicon solutions * Participate in ... various aspects of physical design : full chip floorplanning, circuit analysis, power/clock distribution, timing optimization, place and route, power integrity… more
- Broadcom (San Jose, CA)
- …PhD in Electrical Engineering or Computer Engineering with 10+ years of experience in Physical design . + Deep knowledge about industry standards in Physical ... Power-grid and high speed clock constraints and specification. + Good understanding of physical design verification methodology to debug LVS/DRC issues at the… more
- Amazon (Cupertino, CA)
- …we're handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze ... - BS + 4yrs or MS + 3yrs in EE/CS - 4+ years of experience in ASIC Physical Design from - RTL-to-GDSII in either 7nm, 14/16nm, 20nm, or 28nm - Block … more
- Amazon (Cupertino, CA)
- …and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new technologies ... in programming/scripting languages (Perl, Python, C++) - Solid understanding of ASIC physical design , and methodologies including synthesis, place and route,… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is seeking an ASIC Design Engineer Intern to join our Infrastructure organization. Our servers and data centers are the foundation upon ... ASIC engineers to build "Green" data center accelerators. **Required Skills:** ASIC Engineer Intern, Design Responsibilities: 1. Participate in… more
- Cisco (San Jose, CA)
- …team to address design bugs and close code coverage. * Work closely with physical design team to close design timing and place-and-route issues. * ... Who You'll Work With You will work with exceptional talent with vast ASIC design and development expertise. With Cisco being a systems company, you will also… more
- Cisco (San Jose, CA)
- …team to address design bugs and close code coverage. * Work closely with physical design team to close design timing and place-and-route issues. * ... Who You'll Work With You will work with exceptional talent with vast ASIC design and development expertise. With Cisco being a systems company, you will also… more
- Cisco (San Jose, CA)
- …verified. You will work closely with Back-end team on timing signoff for seamless physical design closure. You will also collaborate with the System and Software ... Engineering, Computer Science or related degree with 5+ years of ASIC design experience or Masters degree in Electrical Engineering, Computer Science or… more
- Capgemini (San Francisco, CA)
- **Job Title: ASIC Design Verification Infrastructure Engineer (Modern Python experience is must)** **Job Location: Sunnyvale, CA (Remote work is OK)** **Job ... by Capgemini. **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _ASIC Design Verification Engineer (with modern Python programming)_ **Location:**… more
- Meta (Menlo Park, CA)
- …Co-work with internal silicon, architecture and system teams and externally engaged partners, ASIC design partners, foundry and OSAT and substrate vendors 6. ... **Summary:** Meta is looking for an experienced ASIC Packaging Engineer , Mechanical/Thermal modeling focus...ASIC R&D and manufacturing to drive the mechanical/thermal design using advanced FEA of new ASICs, and make… more
- Meta (Sunnyvale, CA)
- …build "Green" data center accelerators. **Required Skills:** ASIC Engineer Intern, Implementation Responsibilities: 1. Participate in Design Implementation, ... **Summary:** Meta is seeking an ASIC Engineer Intern to join our...efficiently. You will have an opportunity to participate in design implementation/emulation, physical design , EDA… more
- Cisco (San Jose, CA)
- … ASIC team can provide. You will work with exceptional talent with vast ASIC design and development expertise. With Cisco being a systems company, you will ... first customer shipments Your Impact You are a diligent Design /SDC Engineer with strong analytical skills and...refining design and timing constraints for seamless physical design closure. As part of this… more
- Meta (Sunnyvale, CA)
- …silicon lifecycle to help build and scale silicon for our smart wearables products. As an ASIC Engineer in our team, you will join a dynamic group of industry ... twelve (12) to sixteen (16) weeks long. **Required Skills:** Asic Engineer Intern, Custom Compression IPs on...Experience with Lint, Synthesis, Timing Closure, Formal Verification or Physical Design tools. 11. Experience with scripting… more
- Broadcom (San Jose, CA)
- …clock methodology, power planning and analysis, timing closure, signal integrity and physical design checks. Chip level expertise in DRC/LVS Calibre tools. ... please Sign-In before you apply.** **Job Description:** **Job Description:** + ASIC implementation engineer with demonstrated expertise in multiple disciplines… more
- Cisco (San Jose, CA)
- …and efficient memory designs, custom library development (Standard Cell and I/O), physical design & DFT, Signal Integrity, and complexed packaging technology. ... a relevant position opens. Who You'll Work With The ASIC Group works closely with other development teams within...silicon process nodes with ownership extending to complete in-house physical design . Who You Are * Ability… more
- Amazon (Sunnyvale, CA)
- …in Electrical / Communications Engineering - 7+ years of experience in digital design - Experience with physical implementation flows Amazon is committed to ... Estimate power, performance, and area for significant IPs early in design cycle - Execute on design specifications to deliver high quality RTL - Ensure quality… more