- Google (Sunnyvale, CA)
- Physical Design CAD and Methodology Lead _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Advanced** Experience owning outcomes and decision making, ... equivalent practical experience. + 8 years of experience with physical design flow and methodologies. + Experience...a team that is transitioning to a new chip design methodology , giving you the opportunity to… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ASIC Physical Design Methodology / CAD Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where ... with the ultimate goal of enabling human life on Mars. SR. SOC/ASIC PHYSICAL DESIGN METHODOLOGY / CAD ENGINEER (SILICON ENGINEERING) At SpaceX we're… more
- Amazon (Cupertino, CA)
- …- BS + 10yrs or MS + 7yrs in EE/CS - 5+ years developing physical design methodology or CAD flows in synthesis, PNR, and sign-off areas for advanced ... integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to...ML Accelerator chips in advanced nodes Drive Optimizations in CAD flows/methodologies for PPA and TAT improvements Work with… more
- Amazon (Cupertino, CA)
- …today. Key job responsibilities - You will create and support innovative physical design methodology and CAD flows. - Develop cloud infrastructure to ... support physical design work. - Drive improvement in RTL2GDS flows/...or CS - Minimum of 3+ years in developing design methodology or CAD flows… more
- Microsoft Corporation (Mountain View, CA)
- …your domain and act in partnership with the execution team. - Provide leadership to the design community for the CAD domain for which you are responsible. - Work ... engineers to join our Central Front-End Tools, Flows and Methodology (TFM) group. This team drives state-of-the-art converged solutions,...design . - 5+ years of experience in digital design or CAD flows/tools development in this… more
- Cisco (San Jose, CA)
- …focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements ... Implementation flow and post silicon validation phases with additional exposure to physical design signoff activities. **Key Contributions:** + Manages the… more