• Senior DFT Engineer

    Cisco (San Jose, CA)
    …Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a member of this team you ... groundbreaking next generation networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow and post silicon… more
    Cisco (10/17/24)
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  • Senior E/E & Semiconductor Engineer

    Capgemini (San Francisco, CA)
    **Job Role:** **Physical Design (Synthesis) Engineer ** **Job Location : San Jose CA** **Job Description** + At least 7 years of experience in ASIC/SOC project design ... and development + Hands on with Cadence tools, DFT flow & physical aware flow + Prior experience...towards Intelligent Industry. Capgemini Engineering has more than 55,000 engineer and scientist team members in over 30 countries… more
    Capgemini (11/12/24)
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  • Senior Test Engineer

    Power Integrations (San Jose, CA)
    Senior Test Engineer Location: San Jose,...with IC design team to understand design specifications and DFT proposals. + Create test programs in C language, ... debug and validate silicon on ATE + Design test interface hardware for ATE + Innovate to improve robustness of test solution and improve cost of test. + Supports and is responsible for sustaining and continuous improvement of production tests for multiple… more
    Power Integrations (11/21/24)
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  • Sr. DDR IP Design Engineer (Silicon…

    SpaceX (Sunnyvale, CA)
    …to support critical milestones COMPENSATION & BENEFITS: Pay range: ASIC/FPGA Design Engineer / Senior : $170,000.00 - $230,000.00/per year Your actual level and ... Sr. DDR IP Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX...crossing (CDC) logic + Exposure to Design For Test ( DFT ), understanding of scan and writing DFT more
    SpaceX (10/21/24)
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  • Sr. Electrical Engineer

    Abbott (Alameda, CA)
    …new sensing technology. Our location in Alameda, CA currently has an opportunity for a Senior Electrical Engineer and this is a full time in-office role. This ... cross-functional working relationships as well as provide effective communication to Senior Management. **What you'll work on** + Research, specify, design, verify,… more
    Abbott (01/07/25)
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  • COPD (Customer Owned Physical Design)…

    Broadcom (San Jose, CA)
    …**Job Description:** Technical Lead for Physical Designs Are you a versatile, senior engineer capable of leading external and internal cross-functional teams? ... resident expert in areas such as physical design, STA, DFT , and packaging? Have you taped out so many...globe connected. Our ASIC products division is looking for senior , physical design engineering veterans to guide teams designing… more
    Broadcom (11/28/24)
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  • Sr. Silicon ATE Engineer , Project Kuiper

    Amazon (Sunnyvale, CA)
    …and underserved communities around the world. Come work at Amazon! The Role: As Senior Silicon ATE Test Engineer , you will engage with an experienced ... SoCs tested on Teradyne and Advantest equipment. Convert test patterns from the DFT team into tester-suitable formats (eg ATP). Run test vectors on test platforms… more
    Amazon (11/14/24)
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  • Sr. SOC/ASIC Physical Design Engineer

    SpaceX (Sunnyvale, CA)
    …hours and weekends as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer / Senior : $170,000.00 - $230,000.00/per year Your actual level and base ... Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX...CMOS analog circuit and physical design + Knowledge of DFT /Scan/MBIST/LBIST and understanding of their impact on physical design… more
    SpaceX (11/15/24)
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  • PCB Design Engineer

    Snap Inc. (Palo Alto, CA)
    …first pair of glasses that bring augmented reality to life. We're looking for a Senior PCB Designer to join the SnapLab Hardware team at Snap Inc! What you'll do: ... + Experience routing impedance controlled nets, including differential pairs, per engineer 's instructions and component specifications. + Strong skills in designing… more
    Snap Inc. (12/07/24)
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  • Sr. Physical Design Methodology Engineer

    Amazon (Cupertino, CA)
    …of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new technologies and architectures, while ensuring ... physical design work. Interface directly with RTL, Physical Design, Package Design, DFT and other teams to improve methodologies and efficiencies and drive efforts… more
    Amazon (10/18/24)
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  • ASIC Design Engineer , Cloud-Scale Machine…

    Amazon (Cupertino, CA)
    …responsibilities - integrate multiple subsystems into top level SOC, ensure correct clock/reset/functional/ DFT signal routing - As a key member of the ASIC design ... we're building an environment that celebrates knowledge-sharing and mentorship. Our senior members enjoy one-on-one mentoring and thorough, but kind, code reviews.… more
    Amazon (12/19/24)
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