• Senior Design Verification

    Microsoft Corporation (Mountain View, CA)
    …Azure AI SOCs, cloud accelerators, cloud servers, and clients. We are looking for a Senior Design Verification Engineer to work on leading edge ... where everyone can thrive at work and beyond. We are looking for a ** Senior Design Verification Engineer ** to join the team. **Responsibilities** As a… more
    Microsoft Corporation (01/24/25)
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  • Senior Design Verification

    Google (Mountain View, CA)
    …in SoCs. + Experience in Advanced RISC Machine (ARM) and RISC-V processor based Design Verification including tool chains and C based testing. + Experience in ... low-power design verification . Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's… more
    Google (01/21/25)
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  • Senior Design Verification

    quadric.io, Inc (Burlingame, CA)
    …progress on verification Requirements + At least 5 years of experience in design verification for CPU or GPUs. + Deep knowledge of leading verification ... Collaborate with architects, HW & SW designers to document verification test plans + Implement testbenches using commercial VIPs...drivers, assembly or C++ programs to efficiently test the design + Use coverage metrics to track and communicate… more
    quadric.io, Inc (12/10/24)
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  • Senior Design Verification

    Cisco (San Jose, CA)
    …developed in the industry. What You'll Do You will participate in the ASIC design verification and Emulation for Cisco high-end switching products. One of the ... Verification teams and Architects to understand chip architecture and drive design verification requirements. You'll work with SDK and Software teams as part… more
    Cisco (01/07/25)
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  • Senior ASIC Design

    Cisco (San Jose, CA)
    …customer shipments. What You'll Do * You will participate in the ASIC design verification for Cisco high-end switching products. * Development of simulation ... related experience * Experience in System Verilog/UVM. * Experience with ASIC design and verification processes, debugging, methodology, and tools. * Experience… more
    Cisco (01/24/25)
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  • Senior Mixed-Signal Design

    Google (Mountain View, CA)
    … using SystemVerilog for ASIC designs. + Experience developing and maintaining design verification (DV) testbenches, test cases, and test environments. Preferred ... qualifications: + Experience in creating detailed block-level design verification strategies and plans. + Experience creating or using verification more
    Google (01/15/25)
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  • Sr. Design Verification

    SpaceX (Sunnyvale, CA)
    …dynamic environment with changing needs and requirements COMPENSATION & BENEFITS: Pay range: Design Verification Engineer / Senior : $170,000.00 - ... Sr. Design Verification Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out… more
    SpaceX (12/05/24)
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  • Senior E/E & Semiconductor Engineer

    Capgemini (Sunnyvale, CA)
    Engineer ** **Sunnyvale CA** **Job description:** We are seeking Mixed signal Design Verification Engineer who is proficient in system verilog real ... _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - Mixed Signal Verification Engineer_ **Location:** _CA-Sunnyvale_… more
    Capgemini (12/05/24)
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  • ASIC Design Verification

    Cisco (San Jose, CA)
    …Who You Are The Core Hardware Business Unit is on the lookout for a driven Senior Verification Engineer to join us in developing the next generation of ... in EE, CE, or other related field. * 7+ years of related ASIC design verification experience. * Proficient in ASIC verification using UVM/System Verilog. *… more
    Cisco (12/31/24)
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  • Senior Silicon Verification

    ManpowerGroup (Mountain View, CA)
    …client, a leading technology company in the semiconductor industry, is seeking a Silicon Verification Engineer 5 to join their team. As a Silicon Verification ... aligning successfully with the organization's goals. Job Title: Silicon Verification Engineer 5 Location: Remote (PST Hours)...Interface (DPI) calls for C reference models to validate design functionality. 4. Design and develop UVM… more
    ManpowerGroup (01/24/25)
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  • Design Verification Engineer

    Amazon (Cupertino, CA)
    …Qualifications - BS Degree or Higher in EE or CS or CE. - 3+ years of design verification experience using System Verilog and UVM - 3+ years of experience in ... and Japan, and customers across all industries. We are seeking experienced Hardware Design Engineers to build the next generation of our cloud server infrastructure.… more
    Amazon (11/02/24)
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  • Senior E/E & Semiconductor Engineer

    Capgemini (San Francisco, CA)
    **Physical Design Engineer ** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the physical chip ... Timing with SI and OCV, Power, IR and Physical Verification at both block and chip level *Understanding constraints...**Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - ASIC Physical Design Engineer_ **Location:**… more
    Capgemini (01/15/25)
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  • Senior ASIC Physical Design

    Capgemini (San Francisco, CA)
    **Job Title : Senior ASIC Physical Design Engineer ** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... Timing with SI and OCV, Power, IR and Physical Verification at both block and chip level + Understanding...block and chip level + Understanding constraints and fixing design /timing techniques + Block level implementation from netlist to… more
    Capgemini (01/15/25)
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  • Senior E/E & Semiconductor Engineer

    Capgemini (San Francisco, CA)
    **Job Role:** **Physical Design (Synthesis) Engineer ** **Job Location : San Jose CA** **Job Description** + At least 7 years of experience in ASIC/SOC project ... _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - Physical Design (Synthesis) Engineer_ **Location:** _CA-San… more
    Capgemini (11/12/24)
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  • Senior Power Electronics Design

    Ford Motor Company (Palo Alto, CA)
    …every person is free to move and pursue their dreams. The Power Electronics Design Engineer will own complex drive unit inverter sub-components from concept ... / test equipment. + Plan, coordinate, and execute test campaigns for design verification of inverter sub-components and the inverter system. + Optimize costs… more
    Ford Motor Company (01/18/25)
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  • Senior Physical Design

    Broadcom (San Jose, CA)
    …and features as well as manage extremely large volumes of internet traffic. As a Senior Physical Design Engineer , the ideal candidate will be responsible for ... . Physical implementation of blocks and top-level including clock-tree. . Physical verification and timing closure for block and chip-level. . Static and dynamic… more
    Broadcom (11/27/24)
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  • Senior Hardware Engineer

    Google (Mountain View, CA)
    …of experience in micro-architecture definition. + 3+ years of experience in RTL design verification . + Experience with high performance compute IPs (eg, GPUs, ... can flourish. We are seeking a highly motivated Hardware Engineer to join our team and contribute to development...speed, performance, power, area. + Good understanding of ASIC design flow including RTL design , verification more
    Google (01/22/25)
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  • Senior Digital Design

    Teledyne (Mountain View, CA)
    …for current and emerging challenges. Teledyne Microwave Solutions is hiring a Digital Design Engineer that will be responsible for the digital design ... module interfaces, conducts design reviews, and participates in design implementation. Responsibilities include debugging, verification , and resolving… more
    Teledyne (01/08/25)
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  • Senior Hardware Engineer , Physical…

    Google (Mountain View, CA)
    …ambitious research can flourish. We are seeking a highly motivated Hardware Engineer to join our team and contribute to development of groundbreaking silicon ... are willing to help out with whatever moves silicon design and architecture forward. We regularly need to invent...We are seeking a talented and highly motivated hardware engineer to join our GenAI technical infrastructure research hardware… more
    Google (01/16/25)
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  • DSP or Serdes RTL Senior Principal Digital…

    Cadence Design Systems, Inc. (San Jose, CA)
    …for front-end coding, scripting and developing flows at all phases of the digital design and functional verification . It is further expected that the candidate ... the San Jose office. A Cadence satellite office (if senior with extensive SerDes exp.) will be considered. Position...+ Digital microarchitecture definition and documentation + RTL logic design , debug and functional verification + Strong… more
    Cadence Design Systems, Inc. (01/04/25)
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