- Google (Sunnyvale, CA)
- SoC Silicon Top - Level Floorplan Engineer _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Advanced** Experience owning outcomes and decision making, ... + Own the planning, creation, and delivery of top - level floorplan deliverables and implementation for Silicon SOC projects from concept to working … more
- SpaceX (Sunnyvale, CA)
- …will expand the performance and capabilities of the Starlink network. RESPONSIBILITIES: + Perform SOC top level physical design; floor-planning, I/O, bump & ... Sr. Full Chip Physical Design Engineer ( Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded...SKILLS AND EXPERIENCE: + Experience and deep understanding of SOC top level physical design… more
- Amazon (Cupertino, CA)
- …the servers they power. Our models are used by AWS internal teams for silicon verification and to left-shift software development (as a virtual platform). We are ... you will: * Lead the team responsible for developing SoC models end-to-end, including model architecture, integration with other...debug * Mentor and develop the team, while hiring top talent to continue scaling * Lead new product… more
- Broadcom (San Jose, CA)
- …and memory. + ARM-based SoC Architecture: Define and drive the top - level architecture for complex SoCs utilizing various ARM processor cores (Cortex-M, ... This role is central to bridging the gap between system requirements and silicon implementation, with a strong focus on mixed-signal integration for sensing and… more
- Google (Mountain View, CA)
- …Requirement Documents (PRDs). + Collaborate with Pixel and Android partners to identify top use cases and metrics driving silicon requirements. + Partner with ... Senior Product Manager, Tensor SoC _corporate_fare_ Google _place_ Mountain View, CA, USA;...+ benefits. Our salary ranges are determined by role, level , and location. Within the range, individual pay is… more
- Cisco (San Jose, CA)
- …silicon failure analysis (FA) on ATE and CFT to replicate and diagnose system- level failures, applying silicon debug tools to isolate issues. + Collaborate ... along with 5+ years' experience in IC test engineering, SOC /VLSI test bring-up, characterization and production testing. + Strong...experience in silicon test debug, root causing silicon failures to flop or cell level .… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …related to memory protocols such as DDR, LPDDR, HBM, and GDDR, and to engage with top technology companies making an impact in our world. We are seeking a Post ... Silicon Memory Product Engineer to support silicon ...and debug of Memory IP subsystems. + Support customer SOC and system integration, including ATE deployment and production… more
- Amazon (Sunnyvale, CA)
- …buses like AMBA AXI4 - Experience in integrating third party IP blocks, building top level modules, defining clock domains and power domains - Knowledge of ... various DSP ISA - Experience in entire design flow from architecture to final silicon . - Experience debugging system- level issues - Good programming skills in… more
- Meta (Sunnyvale, CA)
- …and evangelize the Formal Verification Methodology to be used across the group, both at the top level and at the block level 3. Work with Architecture and ... close coverage with targeted Formal Verification Techniques at IP, Subsystem and SoC level 5. Build reusable/scalable environments for Formal Verification and… more
- Amazon (Cupertino, CA)
- …the right trade-offs. Key job responsibilities - integrate multiple subsystems into top level SOC , ensure correct clock/reset/functional/DFT signal routing ... services. Annapurna Labs (our organization within AWS UC) designs silicon and software that accelerates innovation. Customers choose us...technical field - 5+ years in RTL design for SOC - 5+ years in VLSI engineering - 5+… more
- Meta (Sunnyvale, CA)
- …wearable systems. **Required Skills:** Digital Design Engineer Responsibilities: 1. Responsible for top - level or block level uArchitecture definition and RTL ... art graphics algorithms. You will also support the Digital Silicon Architects developing and implementing the next generation custom...implementation 2. Contribute to chip- level integration, verification plan development and verification 3. Define… more
- Cisco (San Francisco, CA)
- …Bring your knowledge of computers and networking and take it to a new level in any one of the following product categories including: cloud, social, mobile/wireless, ... Impact** ** ** Join our award-winning ASIC team, where you'll collaborate with top industry talent to design and deliver ground breaking communications and network… more