- Amazon (Cupertino, CA)
- …trade-offs. Key job responsibilities - integrate multiple subsystems into top level SOC , ensure correct clock/reset/functional/ DFT signal routing - As a key ... scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …who want to make an impact on the world of technology. We are looking for SoC / ASIC Digital Design Engineer with experience in Design for Test ( DFT ). An ... preferred. + Prior 5-15 years of professional experience in SoC / ASIC Digital Design with focus on Design... Digital Design with focus on Design for Test ( DFT ) + Should possess intimate knowledge of DFT… more
- Google (Sunnyvale, CA)
- Senior DFT Static Timing Analysis Engineer, Cloud _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and ... timing analysis and timing ECO creation, timing margins). + Experience in DFT architectures and associated test methodologies. + Experience in Tessent generated … more
- Cisco (San Jose, CA)
- …number of applications are received. Meet The Team You will collaborate with ASIC design teams in the Central Hardware Group, peer Test Engineers in Silicon ... Operations focusing on the ATE test bring-up. You will partner with the Cisco ASIC team to bring up tests, characterize units, and release the test program to… more
- Google (Fremont, CA)
- …qualifications:** + 15 years of experience in Application-Specific Integrated Circuit/System on Chip ( ASIC / SoC ) design, with a focus on both digital logic design ... Senior Silicon Bringup and Test Lead, Raxium _corporate_fare_...and Design for Testability ( DFT ) implementation. + Experience with industry-standard EDA tools for… more