- Broadcom (San Jose, CA)
- …PhD in Electrical Engineering or Computer Engineering with 10+ years of experience in Physical design . + Deep knowledge about industry standards in Physical ... Power-grid and high speed clock constraints and specification. + Good understanding of physical design verification methodology to debug LVS/DRC issues at the… more
- Cisco (San Jose, CA)
- …You will work with outstanding talent and vast ASIC development expertise in design , DV, DFT, physical design , and post-silicon validation The team ... What You'll Do * You will participate in the ASIC design verification for Cisco high-end switching...develop innovative technology, and to power a more inclusive, digital future for everyone. How do we do it?… more
- Cisco (San Jose, CA)
- …focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements ... be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with...and post silicon validation phases with additional exposure to physical design signoff activities. What You'll Do… more
- Cisco (San Jose, CA)
- …and efficient memory designs, custom library development (Standard Cell and I/O), physical design & DFT, Signal Integrity, and complexed packaging technology. ... the latest deep submicron silicon process nodes with ownership extending to complete in-house physical design . Who You Are * Ability to manage multiple tasks and… more
- Cisco (San Jose, CA)
- …basis to address design bugs and close code coverage. * Work closely with physical design team to close design timing and place-and-route issues * ... Do Be part of the development organization as an ASIC Engineering Technical Leader with primary focus on RTL... Engineering Technical Leader with primary focus on RTL Design . * Create micro-architecture specifications and participate in reviews… more
- Cisco (San Jose, CA)
- …processor architecture, Ethernet processing, digital signal processing, high-speed logic design & verification, memory designs, and physical design ... and efficient memory designs, custom library development (Standard Cell and I/O), physical design & DFT, Signal Integrity, and complexed packaging technology.… more
- Cisco (San Jose, CA)
- …focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements ... be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with...and post silicon validation phases with additional exposure to physical design signoff activities. What You'll Do… more
- Cisco (San Jose, CA)
- …focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements ... be in the Silicon One development organization as an ASIC DFT Technical Program Manager in San Jose, CA...and post silicon validation phases with additional exposure to physical design signoff activities. Who You Are… more
- Cisco (San Jose, CA)
- …strategies, and correlation between PNR, Spice, and STA, along with advising the Physical Design team on best practices. * Additionally, you'll develop ... accuracy. Who you'll work with You will collaborate with ASIC Front-end and Back-end teams to understand chip architecture...refining design and timing constraints for seamless physical design closure. As part of this… more
- Cisco (San Jose, CA)
- …testing some of the most complex ASICs being developed. Your Impact As a physical design engineer you will be spearheading the implementation of complex ... multi-hierarchy designs, ensuring robust physical design processes like logic synthesis and...design of an end-to-end IP or integration of ASIC /SoC design . * Design custom… more
- Renesas (San Jose, CA)
- … designs and writing device-level or sub-system specifications + Experience in digital design implementation including logical synthesis and DFT insertion with ... route netlists + Fluent in Verilog RTL coding and ASIC design methodology is a must +...support is a plus + Experience in DFT or physical design is a plus + Experience… more
- Broadcom (San Jose, CA)
- …experience_ + Good knowledge of ARM subsystem + Good knowledge of high speed digital circuit design . + Good knowledge of digital upsampling/downsampling + ... This opening is for working on chips that enable Physical Layer Products for High Speed Optical Communication. +...network. + Good knowledge on FEC (Forward Error Correction) design . + Good knowledge of digital signal… more
- Broadcom (San Jose, CA)
- …industry for IP and chip design + Working knowledge of IP and chip design flow for analog and digital + Experience with parametric and yield data analysis. ... extraction and simulation, abstract and LEF/DEF generation, LVS/ERC checks, physical verification + Conducting design reviews &...from manufacturing, technology and packaging **Job Description** + Provide design support for IP & ASIC to… more
- Cisco (San Jose, CA)
- …and guide them in refining design and timing constraints for seamless physical design closure. As part of this team, you'll contribute to developing ... excel at identifying and resolving timing issues across all design levels. You will collaborate with ASIC ...checklists to streamline STA work, along with advising the Physical Design team on best practices. Minimum… more
- Cisco (San Jose, CA)
- …on installation and maintenance of process design kits (PDKs) for SOC physical design teams. * Experience working with Package and floorplan teams to ... Engineering or Computer Science, with 10+ year minimum of hands-on experience in ASIC implementation and Physical verification * Experience in deep submicron… more
- Capgemini (San Jose, CA)
- …cutting-edge technologies in digital and software to support the convergence of the physical and digital worlds. Coupled with the capabilities of the rest of ... candidate will have a deep understanding of System-on-Chip (SoC) design and architecture, as well as Expertise in performance...+ Experience with Synopsys or Cadence EDA tools and ASIC /SOC Power Analysis Tools. + Deep understanding of SoC… more
- Cisco (San Jose, CA)
- …* STA runs, more specifically at scan modes along with advising the Physical Design team on best practices. * Developing methodologies, guidelines, and ... checklists to streamline STA work, resolve design and flow issues, and drive execution to ensure...including standard cells/memory/IO/IP modeling and its usage in the ASIC flow. * Background in debugging and analyzing timing… more
- Broadcom (San Jose, CA)
- …analysis, diagnostics & yield improvement efforts + Interfacing with the customers, physical design and test engineering/manufacturing teams located globally + ... in a multi-disciplined, cross-department environment + Solid knowledge in analog and digital circuit design , and device physics fundamentals + Excellent problem… more
- Tarana Wireless (Milpitas, CA)
- You will be working on the design , development and integration of calibration software modules for wireless communication systems using multiple antennas. Design ... operating systems. You will collaborate closely with L2/L3 software groups and FPGA/ ASIC teams to deliver cross-layer features. Job Responsibilities: + Design … more