- Cadence Design Systems, Inc. (San Jose, CA)
- …leaders and innovators who want to make an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San Jose, CAJob ... Join the High-Performance Culture at Cadence.As a Technical Presales Engineer , you will support the technical presales of DDR...RTL design in Verilog, System Verilog and FPGA design * Knowledge of AXI, DFI protocols*… more
- Tarana Wireless (Milpitas, CA)
- …global difference, this is the opportunity you've been waiting for. As part of our FPGA Design Team, you'll contribute to the development and testing of advanced ... Need: + BS in Electrical Engineering (MS preferred) + 5+ years of FPGA logic design experience + Expertise in high-speed digital design + Hands-on experience… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …and innovators who want to make an impact on the world of technology. Design Engineer - Emulation & High-Speed Interfaces Palladium Solutions Development Why ... generation of full system emulation and verification solutions-and we're looking for a seasoned Design Engineer to help lead the way. If you're passionate about… more
- Cisco (Milpitas, CA)
- …hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various ... for taking networking system requirements, mapping them into functional blocks for FPGA implementation, working with the cross functional team to address development… more
- Sandia National Laboratories (Livermore, CA)
- …What Your Job Will Be Like: We are seeking an experienced Electronics Engineer to design , develop and support high assurance electronic products. Your ... of specialists focused on cutting-edge work in a broad array of areas. Some of the main reasons we...the design and qualification of products. + Design of FPGA /ASIC based digital and analog… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …front-end coding, scripting and developing flows at all phases of the digital design and functional verification. It is further expected that the candidate will be ... the San Jose office. A Cadence satellite office (if senior with extensive SerDes exp.) will be considered. Position...well as a thorough understanding of the end-to-end digital design flow in order to accurately and efficiently collaborate… more