- Broadcom (San Jose, CA)
- …PhD in Electrical Engineering or Computer Engineering with 10+ years of experience in Physical design . + Deep knowledge about industry standards in Physical ... Power-grid and high speed clock constraints and specification. + Good understanding of physical design verification methodology to debug LVS/DRC issues at the… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Engineer...and CMOS solid state physics + Knowledge of CMOS digital design principles, basic standard cells their ... possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our… more
- Meta (Sunnyvale, CA)
- …our ASIC engineers to build "Green" data center accelerators. **Required Skills:** ASIC Engineer, Physical Design Responsibilities: 1. Develop and own ... design of an end-to-end IP or integration of ASIC /SoC design and point out lower power...Knowledge of geometry/process/device technology implications on physical design 11. Knowledge of Computer Architecture, Digital … more
- Palo Alto Networks (Santa Clara, CA)
- …meet aggressive goals for area, timing, power, and testability in close collaboration with ASIC physical design engineers + Perform synthesis + Optimize ... Career** As a Design engineer on the ASIC team, you will create complex digital ...+ Debugging simulation, emulation, and silicon validation + Analyzing physical design reports and fixing timing and… more
- Cisco (San Jose, CA)
- … ASIC team can provide. You will work with exceptional talent with vast ASIC design and development expertise. With Cisco being a systems company, you will ... refining design and timing constraints for seamless physical design closure. As part of this...Experience with microarchitecture and RTL implementation. * Experience with digital design concepts (eg. clocking and async… more
- Google (Sunnyvale, CA)
- …a related technical field, or equivalent practical experience. + 10 years experience in ASIC physical design and methodologies in advanced process nodes. + ... and its integration within AI/ML-driven systems. As an Application-Specific Integrated Circuit ( ASIC ) Physical Design Lead on the chip implementation… more
- Cisco (San Jose, CA)
- …You will work with outstanding talent and vast ASIC development expertise in design , DV, DFT, physical design , and post-silicon validation The team ... What You'll Do * You will participate in the ASIC design verification for Cisco high-end switching...develop innovative technology, and to power a more inclusive, digital future for everyone. How do we do it?… more
- SanDisk (Milpitas, CA)
- … design , digital IP integration, verification, HW emulation, DFT, and physical design . + Strong leadership and communication skills, with the ability to ... our solutions have become the beating heart of the digital world we're living in and that we have...the organization with best-in-class processes and workflows to reduce ASIC design cycle times in line with… more
- Palo Alto Networks (Santa Clara, CA)
- …equivalent military experience required - MSEE preferred + Minimum 10 years experience in ASIC design verification + Demonstrated success in taking ASIC ... mission: Being the cybersecurity partner of choice, protecting our digital way of life. Our vision is a world...we all win with precision. **Your Career** As a Design Verification engineer on the ASIC team,… more
- Cisco (San Jose, CA)
- …programming experience. * Experience with digital concepts and fundamentals of ASIC design principles. * Interactive and waveform debug experience. Preferred ... achieve coverage closure. * Collaborate with the verification and physical design teams to resolve block level...in Electrical or Computer engineering and 5+ years of ASIC Design experience or Master's degree in… more
- Amazon (Cupertino, CA)
- …you - come build the future with us! Key job responsibilities * Perform physical design for Amazon's machine learning custom silicon solutions * Participate in ... various aspects of physical design : full chip floorplanning, circuit analysis,...Distribution, Spice Circuit analysis Experience with Place and Route, digital implementation Experience with EDA tools from Synopsys (ICC2,… more
- Cisco (San Jose, CA)
- …basis to address design bugs and close code coverage. * Work closely with physical design team to close design timing and place-and-route issues * ... Do Be part of the development organization as an ASIC Engineering Technical Leader with primary focus on RTL... Engineering Technical Leader with primary focus on RTL Design . * Create micro-architecture specifications and participate in reviews… more
- Amazon (Sunnyvale, CA)
- …Engineering. * 10+ years of experience in ASIC implementation. * Experience in leading physical design . * Strong exposure to UPF flow for low power design ... Project Kuiper's sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit...flow for various technology nodes. * Work with the ASIC design and DFT teams to understand… more
- Cisco (San Jose, CA)
- …focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements ... be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with...participate in the creation of Innovative Hardware DFT & physical design aspects for new silicon device… more
- Amazon (Sunnyvale, CA)
- …Ph.D degree in Electrical / Communications Engineering - 7+ years of experience in digital design - Experience with physical implementation flows Amazon is ... or related field, or equivalent experience - 5+ years of experience in digital design - Experience with products that have gone to volume production - Hands… more
- Cisco (San Jose, CA)
- …lead in San Jose, CA. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive high-quality DFT ... hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various… more
- Meta (Sunnyvale, CA)
- …machine learning accelerators and state-of-the-art SoCs. **Required Skills:** Digital Design Engineer Responsibilities: 1. Contribute to ASIC digital ... architecture, firmware, and algorithms.We are growing our Machine Learning ASIC Design and uArchitecture team within RL...a world-class group of researchers and engineers using your digital design skills to implement and contribute… more
- Meta (Sunnyvale, CA)
- …machine learning accelerators and state-of-the-art SoCs. **Required Skills:** Digital Design Engineer Responsibilities: 1. Contribute to ASIC digital ... a world-class group of researchers and engineers using your digital design skills to implement and contribute...integration and ASIC architecture 12. Knowledge of Physical Design and Low power implementation 13.… more
- Meta (Sunnyvale, CA)
- …and then the silicon architecture for it. **Required Skills:** Digital Design Engineer Responsibilities: 1. Contribute to ASIC digital uArchitecture ... for production silicon shipped in volume 9. Knowledge of Physical Design and Low Power implementation 10....10. Experience in IP Silicon development 11. Experience in digital design uArchitecture, RTL coding 12. Experience… more
- Google (Mountain View, CA)
- … design . + Knowledge of ASIC Verification, DFT, synthesis, STA, or Physical Design . + Knowledge of high performance and low-power design techniques. ... with an emphasis on computer architecture. + Experience with ASIC design methodologies for clock domain checks,...enhancements + Work with the multi-site cross-functional teams: Verification, Design for Test, Physical Design … more