- Palo Alto Networks (Santa Clara, CA)
- …goal is to create an environment where we all win with precision. **Your Career** As an ASIC Integration and CAD Engineer, you will ensure that the ASICs in ... equivalent military experience - MSEE preferred + Minimum 5 years experience in ASIC integration and front end design + Demonstrated success in taking ASICs to… more
- NVIDIA (Santa Clara, CA)
- …to build sophisticated GPU and Tegra chips and interact directly with unit-level ASIC , Physical Design, CAD , Package Design, Software, DFT and other teams. ... NVIDIA System-On-Chip (SOC) group is looking for a top ASIC Engineer with a curiosity about SOC design automation,...Engineer with a curiosity about SOC design automation, RTL integration , chip build and assembly, and padring design and… more
- Cisco (San Jose, CA)
- …Work With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on Design-for-Test. ... * Work closely with the design/design-verification and PD teams to enable the integration and validation of the Test logic in all phases of the implementation… more
- Amazon (Cupertino, CA)
- …and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new technologies and ... Define, develop and deploy innovative physical design methodologies (RTL2GDS) and CAD flows for ML Accelerator chips in advanced nodes Drive improvement… more
- SpaceX (Sunnyvale, CA)
- …as necessary to support critical milestones COMPENSATION & BENEFITS: Pay range: ASIC /FPGA Design Engineer/ Senior : $170,000.00 - $230,000.00/per year Your actual ... cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing… more
- Amazon (Cupertino, CA)
- …and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and architectures, ... building an environment that celebrates knowledge-sharing and mentorship. Our senior members enjoy one-on-one mentoring and thorough, but kind,...3yrs in EE/CS - 4+ years of experience in ASIC Physical Design from - RTL-to-GDSII in either 7nm,… more