- Western Digital (San Jose, CA)
- …the further development of concepts and methods for the EDA design environments with focus on analog / mixed signal ASIC design in advanced nodes. + Solid ... understanding of PDK's, effectively manage PDK libraries, collaterals and drive migration of design environments for incremental releases. + Development of Calibre Physical Verification decks for cmos PLANAR and FINFET technologies including DRC, LVS, PERC,… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …analysis, physical design flow, testbench creation and simulation, some familiarity with analog / mixed - signal design and verification flows, and basic ... Portfolio. The ideal candidate for this position is a seasoned High-Speed Interface Technologist who enjoys leading a team of skilled engineers and working with… more