- Google (Sunnyvale, CA)
- SoC Physical Design Engineer _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and mentoring more ... and its integration within AI/ML-driven systems. As a System on a Chip ( SoC ) Physical Design Engineer , you will collaborate with Register-Transfer Level… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior SOC Design Engineer to join our SOC Design team! At NVIDIA, you'll collaborate with brilliant minds to build ... power everything from AI to gaming! As a Senior SOC Design Engineer , you'll work...integrating advanced ASICs, and partnering with experts in ASIC design , Physical design , CAD, Package… more
- SpaceX (Sunnyvale, CA)
- ASIC/ SOC DFT Engineer (Silicon Engineering) Sunnyvale,...design readiness for scan insertion through RTL and physical design Scan Design Rule ... the ultimate goal of enabling human life on Mars. ASIC/ SOC DFT ENGINEER (SILICON ENGINEERING) At SpaceX...content through gate level simulation + Collaborate with circuit physical design team, ATPG team and manufacturing… more
- Google (Sunnyvale, CA)
- …a related field, or equivalent practical experience. + 10 years of experience in physical design (eg, with a focus on floorplanning, integration, or top-level ... SoC Silicon Top-Level Floorplan Engineer _corporate_fare_...chip assembly). + Experience in physical design working on advanced nodes. +… more
- SpaceX (Sunnyvale, CA)
- ASIC/ SOC DV Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... the ultimate goal of enabling human life on Mars. ASIC/ SOC DV ENGINEER (SILICON ENGINEERING) At SpaceX...and weekends as needed COMPENSATION AND BENEFITS: Pay range: Design Verification Engineer /Level I: $130,000.00 - $155,000.00/per… more
- Amazon (Cupertino, CA)
- …be working directly with architects, designers, verification engineers, software teams, and Physical Design experts - defining best practices to reduce power ... in datacenters all around the world. As a Sr. SoC Power Engineer , you'll contribute to the...rollups - Work with designers, architects, Verification engineers and Physical Design engineers to develop vectors for… more
- SpaceX (Sunnyvale, CA)
- Sr. Full Chip Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out ... of enabling human life on Mars. SR. FULL CHIP PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING)...and capabilities of the Starlink network. RESPONSIBILITIES: + Perform SOC top level physical design ;… more
- Meta (Sunnyvale, CA)
- …the efficiency and innovation of our data center applications. **Required Skills:** ASIC Engineer Physical Design Responsibilities: 1. Develop and own ... Join Meta's Infrastructure organization to leverage your expertise in ASIC Physical Design , driving high-performance, AI/ML SoC and IP development from… more
- Meta (Sunnyvale, CA)
- …on Chip ( SoC ) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own physical ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure...design of an end-to-end IP or integration of ASIC/ SoC design and point out lower power… more
- Google (Sunnyvale, CA)
- Physical Design Engineer , 3D...SoC 's. You will help develop new 3D technology physical design methodologies to drive best product ... architecture and its integration within AI/ML-driven systems. As a Physical Design Engineer in 3D...3D technology platform for custom, high performance ASIC's and SoC 's, from design through manufacturing, packaging, and… more
- Google (Sunnyvale, CA)
- Physical Design Engineer , Google Cloud _corporate_fare_...and route for SoC or with multiple-cycles of SoC in ASIC design . **About the job** In ... focus on TPU architecture and its integration within AI/ML-driven systems. As a Physical Design Engineer , you will collaborate with RTL, design for… more
- Microsoft Corporation (Mountain View, CA)
- …Python OR equivalent experience. - 10+ years of relevant experience. - Expertise in CPU/ SoC design principles. - For Front-End Handoff CAD Roles: - In-depth ... Emulation, Design Synthesis, RTL Power Anaysis, PD Handoff and SoC integration. This team supports numerous simultaneous projects within Microsoft by developing… more
- Google (Sunnyvale, CA)
- Physical Design Engineer , University Graduate, PhD _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, ... Languages like Python, Tcl, Perl. + Proficiency in fundamental SoC architecture and hardware description languages such as Verilog,...architecture and its integration within AI/ML-driven systems. As a Physical Design Engineer , you will… more
- Microsoft Corporation (Mountain View, CA)
- …sustainability related to Microsoft cloud hardware. We are looking for a Senior Design Verification Engineer for customer focused solutions, insight and industry ... the Cloud infrastructure. We are looking for a Senior Design Verification Engineer to join the team....Central Processing Unit(CPU), Graphics Processing Unit(GPU) or System on Chip( SoC ) IPs. + Demonstrated experience in one or more… more
- Microsoft Corporation (Mountain View, CA)
- …engineers to help achieve that mission. We are looking for a **Senior Design Engineer ** to work in the dynamic Microsoft Artificial Intelligence System ... program you will be interacting with various teams, including architecture, verification, and physical design , ensuring that the design is implemented and… more
- SpaceX (Sunnyvale, CA)
- Sr. ASIC Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... goal of enabling human life on Mars. SR. ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're...Provide timing constraint for those IPs and support the physical implementation team (synthesis, timing closure, formality check) +… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior ASIC Design Engineer to join our Memory Subsystem Team! As a Senior ASIC Design engineer at NVIDIA, you'll join a group of ... of our Memory Subsystem Design team, you will collaborate with architects/ design verification/formal verification/ physical design team to deliver a… more
- NVIDIA (Santa Clara, CA)
- …closure to innovate and implement new Clocking topologies in RTL. + Collaborate with Physical design and timing team to evaluate Clocking concerns and develop ... The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible...will be architecting the clock domain to satisfy functional, physical and testing design requirements. + Engage… more
- NVIDIA (Santa Clara, CA)
- …closure to innovate and implement new Clocking topologies in RTL. + Collaborate with Physical design and timing team to evaluate Clocking concerns and develop ... The clocks group is looking for an outstanding ASIC engineer to join the team. The Team is responsible...will be architecting the clock domain to satisfy functional, physical and testing design requirements. + Engage… more
- Broadcom (San Jose, CA)
- …+ Hands on experience with timing analysis and place and route tools for ASIC/ SoC Design is a must. **Additional Requirements:** + Good problem solver. + Self ... and/or timing (constraints, STA) can be considered for this position. + Proficient in design implementation activities both at block and SoC level. + Well… more