• IC CAD Engineer

    Power Integrations (San Jose, CA)
    In this position, you will be responsible for supporting all IC design CAD tools, which include but not limited to Cadence schematic entry, mixed mode circuit ... license management, user support, and vendor interface. You will also work with IC layout designers in taping out physical layout design to mask shop. Requirements:… more
    Power Integrations (01/09/25)
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  • IC Design Engineer

    Broadcom (San Jose, CA)
    …and layout engineers to optimize layout for area and performance + Work with CAD , packaging and foundry teams in resolving layout and / or verification issues + ... required on technologies: 40nm, 16nm / 7nm FinFet -Knowledge of I/O, ESD, packaging, CAD setup, Cadence SKILL and Unix scripting is a plus -A team player,… more
    Broadcom (01/15/25)
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  • Technologist - Analog/Mixed-Signal CAD

    Western Digital (San Jose, CA)
    …of deck/techFiles generation and validation. + Experience with Cadence custom IC Virtuoso platform to create layout test structures, to validate verification ... etc.). + Ensuring the operation and support within the CAD / IT-team for all ASIC designers worldwide. +...REQUIRED + BSEE with 10+ years of experience in CAD development, Or CAD Support + Must… more
    Western Digital (11/16/24)
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  • Principal Layout Engineer

    ManpowerGroup (San Jose, CA)
    Sr. Layout Engineer **SUMMARY:** A fast-growing Power Management division focusing on Power Loss Protection, PMICs, Motor Control, and Battery Management solutions ... and Industrial applications is seeking an experienced Principal Layout Engineer . **RESPONSIBILITIES:** + Layout of Power and Analog integrated...JI and SOI + Collaborate with Analog and Power IC design engineers in Asia and the US +… more
    ManpowerGroup (01/02/25)
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  • Design Engineer Intern

    Cadence Design Systems, Inc. (San Jose, CA)
    …Cores & DSP, and Vision Cores. The intern will work with the Physical Design CAD team and R&D to adopt latest capabilities to optimize the PPA for next generation ... Requirements: The student intern should have completed foundational coursework in Digital IC design, Computer Architecture and VLSI design. Exposure to VLSI design… more
    Cadence Design Systems, Inc. (10/29/24)
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  • Principal, Design Engineering - Power

    Celestica (San Jose, CA)
    …an unrelenting drive to find the way for our customers. **Let's engineer the future together** . Responsible for architecting, implementing, and supporting power ... work with SI engineers to define SI constraints, Guide CAD designers and bring-up and debug issues. + Set...create and maintain the preferred list + DC relevant IC selection, create and maintain the preferred list +… more
    Celestica (01/15/25)
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