• ASIC and/or FPGA Design

    The Boeing Company (Kent, WA)
    …Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design and Verification Engineers at Lead, Senior & Principal ... across the company and around the world and support ASIC / FPGA design and verification...HDL coding, and physical design realization (through gate -level netlists for ASIC designs) + Integrate… more
    The Boeing Company (01/17/25)
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  • FPGA Verification Engineer, Kuiper…

    Amazon (Redmond, WA)
    …Engineering, related discipline, or equivalent experience * 5+ years of experience in FPGA / ASIC design verification * Experience planning, developing, ... SystemVerilog/UVM * Experience developing and implementing test plans. * Experience with FPGA / ASIC design and verification tools (Synopsys, Vivado,… more
    Amazon (01/04/25)
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  • ASIC / FPGA Verification

    SpaceX (Redmond, WA)
    ASIC / FPGA Verification Engineer (Silicon Engineering) at SpaceX Redmond, WA SpaceX was founded under the belief that a future where humanity is out exploring ... the ultimate goal of enabling human life on Mars. ASIC / FPGA VERIFICATION ENGINEER (SILICON ENGINEERING)...or computer engineering + 2+ years of experience with design verification and test bench development PREFERRED… more
    SpaceX (11/01/24)
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  • Sr. DDR IP Design Engineer (Silicon…

    SpaceX (Redmond, WA)
    …as necessary to support critical milestones COMPENSATION & BENEFITS: Pay range: ASIC / FPGA Design Engineer/Senior: $160,000.00 - $220,000.00/per year Your ... will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design , validation, product engineering, ASIC implementation). In this… more
    SpaceX (01/19/25)
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  • Digital Design Engineer

    Meta (Redmond, WA)
    …implementation. 16. SystemVerilog OVM/UVM experience. 17. Experience in SoC integration and ASIC architecture. 18. Experience with low power design and ... **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will...Computer Vision/Image Sensing IP. 2. Contribute to chip-level integration, verification plan development and verification . 3. Define… more
    Meta (11/01/24)
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