• ASIC Design Engineer

    Broadcom (San Jose, CA)
    …already have a Candidate Account, please Sign-In before you apply.** **Job Description:** The ASIC Design Engineer will need to interact internally with the ... manufacturing yield. The candidate should have a strong understanding of VLSI and ASIC physical design 20+ years of experience w/ a deep understanding of ASIC more
    Broadcom (11/01/24)
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  • Senior E/E & Semiconductor Engineer

    Capgemini (San Francisco, CA)
    **Physical Design Engineer ** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the physical chip ... **Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - ASIC Physical Design ...**Title:** _Senior E/E & Semiconductor Engineer - ASIC Physical Design Engineer_ **Location:** _CA-San Francisco_… more
    Capgemini (10/16/24)
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  • ASIC Design Verification…

    Cisco (San Jose, CA)
    …You'll Work With: You will be in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You collaborate closely ... for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers...designers, hardware and cross functional teams to verify the ASIC in simulation, in emulation and during ASIC more
    Cisco (11/01/24)
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  • Senior ASIC Physical Design

    Capgemini (San Francisco, CA)
    **Job Title : Senior ASIC Physical Design Engineer ** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... by Capgemini. **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior ASIC Physical Design Engineer_ **Location:** _CA-Santa Clara_ **Requisition… more
    Capgemini (10/16/24)
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  • ASIC Engineer , Design

    Meta (Menlo Park, CA)
    …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge machine learning ASICs, capable of world class… more
    Meta (10/18/24)
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  • ASIC Engineer , Design

    Meta (Menlo Park, CA)
    …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration. 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge ASICs in fields such as machine learning, video… more
    Meta (10/09/24)
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  • ASIC Engineer , Design

    Meta (Menlo Park, CA)
    …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge ASICs in fields such as machine learning, video… more
    Meta (10/16/24)
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  • ASIC Design Engineer , Core…

    Google (Mountain View, CA)
    …field, or equivalent practical experience. + 5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or ... to optimize RTL code, performance and power as well as low-power design techniques. Preferred qualifications: + Master's degree or PhD in Electrical Engineering,… more
    Google (10/31/24)
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  • ASIC Digital Design Engineer

    Qualcomm (San Jose, CA)
    …a smarter, connected future for all. As a Qualcomm Digital ASIC Engineer , you will define, model, design , optimize, verify, validate, implement, and document ... in Science, Engineering, or related field and 4+ years of ASIC design , verification, validation, integration, or related work experience. OR Master's degree… more
    Qualcomm (09/23/24)
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  • ASIC Design Verification…

    Cisco (San Jose, CA)
    …Bachelor's Degree in EE, CE, or other related field. * 7+ years of related ASIC design verification experience. * Proficient in ASIC verification using ... design in emulation. * Oversee and manage the ASIC bring-up process. Who You Are The Core Hardware...is on the lookout for a driven Senior Verification Engineer to join us in developing the next generation… more
    Cisco (10/01/24)
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  • ASIC Design Verification…

    Cisco (San Jose, CA)
    …to first customer shipments. What You'll Do * You will participate in the ASIC design verification for Cisco high-end switching products. * Development of ... years of related experience * Experience in System Verilog/UVM. * Experience with ASIC design and verification processes, debugging, methodology, and tools. *… more
    Cisco (10/28/24)
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  • ASIC Rtl Design Engineer

    Broadcom (San Jose, CA)
    …Verilog + Strong experience in Tcl, Perl, Python scripting + Good understanding of ASIC design flow + Strong interpersonal skills and an excellent team player ... for an experienced RTL Designer for our team. The engineer will be responsible for design & development of digital circuits including defining the architecture.… more
    Broadcom (11/01/24)
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  • Asic Design Verification…

    Broadcom (San Jose, CA)
    …Controllers/Wireless Charging Chips and other new initiatives. As a verification engineer , your responsibilities will include: ○ Architect block and full-chip ... ○ Debug RTL and Gate simulations and work with design engineers to verify fixes. ○ Write diagnostics for...Write diagnostics for validation of FPGA prototype (pre-tapeout) and ASIC . ○ Replicate silicon bugs in simulation environment and… more
    Broadcom (11/01/24)
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  • ASIC Design for Test Engineer

    Cisco (San Jose, CA)
    …hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various ... be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with...in San Jose, CA with a primary focus on Design -for-Test. You will work with Front-end RTL teams, backend… more
    Cisco (11/01/24)
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  • ASIC Digital Physical Design

    Broadcom (San Jose, CA)
    …Electrical Engineering or Computer Engineering with 10+ years of experience in Physical design . + Deep knowledge about industry standards in Physical Design , ... and high speed clock constraints and specification. + Good understanding of physical design verification methodology to debug LVS/DRC issues at the chip and block… more
    Broadcom (11/01/24)
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  • Hardware Engineer Intern - ASIC

    IBM (San Jose, CA)
    …Professional Expertise + Experience in ASIC or FPGA logic verification. + Strong FPGA/ ASIC RTL logic design skills. + Experience with programming in C, C++ ... technologists to invent what's next for IBM and the world. As a Hardware Engineer intern, you will work with world-class global researchers focused on design more
    IBM (10/06/24)
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  • ASIC Engineer , Infra Silicon

    Meta (Menlo Park, CA)
    …entire Silicon Lifecycle to build and scale silicon for data center applications.As an ASIC Engineer in the Silicon Lifecycle Engineering team, you will be part ... The role also involves partnering with Full Stack Software, Hardware, ASIC Design , Verification, Emulation, Pre/Post-Silicon Validation & Systems teams… more
    Meta (10/24/24)
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  • ASIC Engineer , Machine Learning…

    Meta (Menlo Park, CA)
    **Summary:** Meta Platforms Inc. is seeking an ASIC Engineer , Architecture to join our Infrastructure organization. This organization is responsible for building ... expert engineers to build "Green" data center accelerators. **Required Skills:** ASIC Engineer , Machine Learning Architecture (PhD) Responsibilities: 1.… more
    Meta (11/06/24)
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  • ASIC Engineer

    Cisco (San Jose, CA)
    …/lead to engage in new development of our UCS family. You will have an ASIC design and verification background with hands-on experience in RTL verification and ... for ASIC bring up Minimum Qualifications * 8+ years ASIC design verification experience with Bachelor's or Master's degree in equivalent experience. *… more
    Cisco (10/01/24)
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  • ASIC Engineer II (Intern) United…

    Cisco (San Jose, CA)
    …understanding of engineering fundamentals and technical problem-solving skills * Familiarity with ASIC design flow, including RTL (Register Transfer Level) ... Knowledge of EDA (Electronic Design Automation) tools used in the ASIC design process is also beneficial. Why Cisco #WeAreCisco, where each person is unique,… more
    Cisco (09/14/24)
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