• ASIC Design Verification

    Cisco (San Jose, CA)
    …* Bachelor's Degree in EE, CE, or other related field. * 7+ years of related ASIC design verification experience. * Proficient in ASIC verification ... design in emulation. * Oversee and manage the ASIC bring-up process. Who You Are The Core Hardware...Unit is on the lookout for a driven Senior Verification Engineer to join us in developing… more
    Cisco (10/01/24)
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  • Hardware Engineer Intern - ASIC

    IBM (San Jose, CA)
    …Expertise + Experience in ASIC or FPGA logic verification . + Strong FPGA/ ASIC RTL logic design skills. + Experience with programming in C, C++ and ... next for IBM and the world. As a Hardware Engineer intern, you will work with world-class global researchers...modules for the AI Accelerator SoC and perform functional verification of design modules. You will be… more
    IBM (10/06/24)
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  • ASIC Digital Design Engineer

    Qualcomm (San Jose, CA)
    …a smarter, connected future for all. As a Qualcomm Digital ASIC Engineer , you will define, model, design , optimize, verify, validate, implement, and document ... degree in Science, Engineering, or related field and 4+ years of ASIC design , verification , validation, integration, or related work experience. OR Master's… more
    Qualcomm (09/23/24)
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  • ASIC Engineer , Design

    Meta (Menlo Park, CA)
    …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration. 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...and hard IP identification, selection and integration. Collaboration with verification and emulation teams in test plan development and… more
    Meta (10/09/24)
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  • ASIC Engineer , Design

    Meta (Menlo Park, CA)
    …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...hard IP identification, selection and integration 5. Collaboration with verification and emulation teams in test plan development and… more
    Meta (10/16/24)
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  • ASIC Engineer

    Cisco (San Jose, CA)
    …* Be responsible for ASIC bring up Minimum Qualifications * 8+ years ASIC design verification experience with Bachelor's or Master's degree in equivalent ... Hardware Business Unit is looking for a motivated Senior Verification engineer /lead to engage in new development...development of our UCS family. You will have an ASIC design and verification background… more
    Cisco (10/01/24)
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  • ASIC Engineer II (Intern) United…

    Cisco (San Jose, CA)
    …Verilog, simulation, synthesis, timing analysis, and verification . Knowledge of EDA (Electronic Design Automation) tools used in the ASIC design process ... understanding of engineering fundamentals and technical problem-solving skills * Familiarity with ASIC design flow, including RTL (Register Transfer Level) … more
    Cisco (09/14/24)
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  • Senior Mixed-Signal ASIC Designer, Project…

    Google (Mountain View, CA)
    …schematic through layout and verification . + Experience with production-grade design verification including Monte-Carlo corner simulations and EM/IR analysis ... Senior Mixed-Signal ASIC Designer, Project Taara Hardware Engineering Mountain View,...The Taara Project is seeking a Senior Integrated Circuit engineer leading the next generation circuit design more
    Google (09/19/24)
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  • Senior Principal Design Verification

    BAE Systems (San Jose, CA)
    …may be available based on position level and/or job specifics. **Senior Principal Design Verification Engineer (Hybrid)** **106128BR** EEO Career Site Equal ... plan and implementing Verilog simulation test cases to verify design functionality. + Build verification environment using...Computer Science + Proficient in SystemVerilog (SV) language for ASIC design , and related FPGA + Knowledge… more
    BAE Systems (10/03/24)
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  • Design Verification Engineer

    Meta (Burlingame, CA)
    …the entire stack, from transistor, through architecture, to firmware, and algorithms. As a Design Verification Engineer at Meta Reality Labs, you will work ... for multiple state of the art IPs. **Required Skills:** Design Verification Engineer Responsibilities: 1....practical experience. 8. Track record of 'first-pass success' in ASIC development cycles. 9. 5+ years of hands-on experience… more
    Meta (10/13/24)
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  • Senior Design Verification

    Microsoft Corporation (Mountain View, CA)
    The Artificial Intelligence Silicon Engineering team is seeking a **Senior Design Verification Engineer ** to deliver premium-quality designs once considered ... manner. We are looking for a ** ** **Senior** ** Design Verification Engineer ** to work...verification with a delivering complex Application Specific Integrated Circuits( ASIC ) or System on Chip(SOC). **Other requirements:** + Ability… more
    Microsoft Corporation (10/12/24)
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  • Silicon Design Verification

    Microsoft Corporation (Mountain View, CA)
    The Artificial Intelligence Silicon Engineering team is seeking a **Silicon Design Verification Engineer ** to deliver premium-quality designs once considered ... high-performance functions in an extremely efficient manner. We are looking for a **Silicon Design Verification Engineer ** to work in the dynamic Microsoft… more
    Microsoft Corporation (10/03/24)
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  • Physical Design Engineer

    Cisco (San Jose, CA)
    …responsible for full Chip physical implementation from RTL to GDSII. As Physical Verification Engineer your main responsibilities will include: * Perform full ... Science, with 7+ year minimum of hands-on experience in ASIC implementation and Physical verification * Prior...Package and floorplan teams to define padring and bump-map design * Background in industry-standard physical verification more
    Cisco (09/14/24)
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  • Design Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …to their limits. This particular position requires the individual to be part of ASIC Design effort of the next generation emulation processors Job Requirements: ... power devices into complex scalable enterprise grade hardware. The design / verification / physical design...the development of complex logic systems. + Aware of ASIC design flow. Experience with design more
    Cadence Design Systems, Inc. (09/19/24)
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  • Senior Design Engineer

    Microsoft Corporation (Mountain View, CA)
    …cloud servers, clients, and augmented reality. We are looking for a **Senior Design Engineer ** to work in the dynamic Microsoft Artificial Intelligence System ... + Throughout the program you will be interacting with various teams, including architecture, verification , and physical design , ensuring that the design is… more
    Microsoft Corporation (10/12/24)
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  • Principal Design Engineer

    Microsoft Corporation (Mountain View, CA)
    …cloud servers, clients, and augmented reality. We are looking for a **Principal Design Engineer ** to work in the dynamic Microsoft Artificial Intelligence System ... + Throughout the program you will be interacting with various teams, including architecture, verification , and physical design , ensuring that the design is… more
    Microsoft Corporation (10/03/24)
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  • Senior Logic Design Engineer

    Microsoft Corporation (Mountain View, CA)
    …servers, clients, and augmented reality. We are looking for a ** Senior Logic Design Engineer ** to work in the dynamic Microsoft Artificial Intelligence System ... including microarchitecture specification development, RTL coding in Verilog/System Verilog, design verification collaboration, and CDC/Lint closure + 4+ years… more
    Microsoft Corporation (10/09/24)
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  • Senior Principal Design Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …innovators who want to make an impact on the world of technology. Senior Principal Design Engineer - Systems and Interfaces San Jose Job Description: The Cadence ... CSG Central Applications Engineering team seeks an experienced SoC design engineer to integrate and support Cadence...+ Develop examples and best practices for SoC system design , verification , and testbenches for CSG IP.… more
    Cadence Design Systems, Inc. (10/08/24)
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  • RTL Design Engineer

    Capgemini (San Francisco, CA)
    …Area, but will consider remote.** **Job description:** . As an RTL Design Engineer you will be responsible for ASIC designs used in Memory Controllers, ... **RTL Design Engineer ** **Location: San Jose CA...applying linting and other (QC) quality checking and basic verification of designs. . Well versed in SystemVerilog Language… more
    Capgemini (10/12/24)
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  • 3D IC Solutions Engineer - Package…

    Siemens (Fremont, CA)
    …Tk based GUI development is a plus. + Working knowledge of IC EDA tools and design methods including: o ASIC design methodology from RTL Synthesis to ... EDA and MCAD tools that facilitate the architectural planning, physical design / verification , muti-die based electrical, thermal, mechanical stress analysis and… more
    Siemens (10/12/24)
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