• ASIC Design for Test

    Cisco (San Jose, CA)
    …Who You'll Work With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on ... Design -for- Test . You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the… more
    Cisco (11/15/24)
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  • ASIC Design for Test Engineer

    Cisco (San Jose, CA)
    …Who You'll Work With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on ... Design -for- Test . You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the… more
    Cisco (11/01/24)
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  • Sr Architect - ASIC

    GE HealthCare (Palo Alto, CA)
    design teams, and Hardware Subsystem teams to help deliver mixed-signal and digital ASIC design solutions. The candidate will engage with module owners and ... associated demodulation, digital filtering, etc functional blocks) and digital ASIC design * Familiarity with System Verilog...solutions to ASIC * Scope and define ASIC test and verification plans, ensuring … more
    GE HealthCare (10/20/24)
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  • ASIC Engineer, Design

    Meta (Menlo Park, CA)
    **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge machine learning ASICs, capable of world class ... complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer, Design Responsibilities: 1. Architecture exploration 2. Micro-architecture… more
    Meta (10/18/24)
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  • ASIC Engineering Technical Leader

    Cisco (San Jose, CA)
    …to engage in new development of our UCS family. You will have an ASIC design and verification background with hands-on experience in RTL verification and ... ASIC bring up Minimum Qualifications * 10+ years ASIC design verification experience with a Bachelor's... verification using UVM/System Verilog. * Prior experience building test benches from scratch, hands on experience with System… more
    Cisco (10/03/24)
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  • ASIC Engineer, Design

    Meta (Menlo Park, CA)
    **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge ASICs in fields such as machine learning, video ... complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer, Design Responsibilities: 1. Architecture exploration. 2. Micro-architecture… more
    Meta (10/09/24)
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  • ASIC Engineer, Design

    Meta (Menlo Park, CA)
    **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge ASICs in fields such as machine learning, video ... complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer, Design Responsibilities: 1. Architecture exploration 2. Micro-architecture… more
    Meta (10/16/24)
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  • ASIC Engineer, Infra Silicon

    Meta (Menlo Park, CA)
    …The role also involves partnering with Full Stack Software, Hardware, ASIC Design , Verification, Emulation, Pre/Post-Silicon Validation & Systems teams ... team to enable a comprehensive pre and post silicon test plan. 4. Create automation and tooling frameworks for...a related field or equivalent experience 14. Experience in ASIC Design , Development or Validation (Silicon bringup,… more
    Meta (10/24/24)
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  • ASIC Engineering Technical Leader

    Cisco (San Jose, CA)
    …Who You'll Work With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on ... Design -for- Test . You will work with Front-end RTL...Design -for- Test . You will work with Front-end RTL teams, backend...for thorough test planning and development of test benches to verify comprehensive Design -for- Test more
    Cisco (10/19/24)
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  • ASIC Engineering Manager, Infra Silicon

    Meta (Menlo Park, CA)
    …in the Silicon Lifecycle Engineering organization. The ideal candidate will be a technical manager with experience in building complex ASICs and delivering them at ... reliable and performant ASICs. They should have experience with test frameworks, tooling and diagnostics, production deployments, debugs, root-cause analysis,… more
    Meta (10/18/24)
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  • ASIC DFT Technical Program Manager

    Cisco (San Jose, CA)
    …Who You'll Work With You will be in the Silicon One development organization as an ASIC DFT Technical Program Manager in San Jose, CA with a primary focus on ... Design -for- Test . You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in… more
    Cisco (11/14/24)
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  • ASIC Engineering Technical Leader

    Cisco (San Jose, CA)
    …hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various ... You'll Do * Would be working to validate system architecture and design implementation micro-architecture to make sure final products would meet performance… more
    Cisco (10/23/24)
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  • ASIC Implementation Engineer

    Broadcom (San Jose, CA)
    …implementation engineer with demonstrated expertise in multiple disciplines including synthesis, design for test , floorplanning, place and route, clock ... power planning and analysis, timing closure, STA, signal integrity and physical design checks. + Participate in large complex design implementations using… more
    Broadcom (11/08/24)
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  • ASIC Implementation Engineer

    Broadcom (San Jose, CA)
    …implementation engineer with demonstrated expertise in multiple disciplines including synthesis, design for test , floorplanning, place and route, clock ... methodology, power planning and analysis, timing closure, signal integrity and physical design checks. Participate in large complex design implementations using… more
    Broadcom (11/01/24)
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  • Analog/mixed-signal IC Design Engineer…

    Cisco (San Jose, CA)
    …with other Acacia mixed-signal engineers to collaborate in order to provide an optimized design that will integrate into the ASIC . In addition, you will have ... do: * As a member of the Mixed Signal Design team, you will be a key member of...Validation: -Solid ESD laboratory practices and methodology -Construction of test setup to test specific circuitry Software… more
    Cisco (11/14/24)
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  • Physical Design Engineer

    Cisco (San Jose, CA)
    …Who You'll Work With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on ... Design -for- Test . You will work with Front-end RTL...Design -for- Test . You will work with Front-end RTL teams, backend...activities. What You'll Do You will be part of ASIC physical design Team which is responsible… more
    Cisco (10/23/24)
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  • Senior Staff Engineer, Electrical Design

    Renesas (San Jose, CA)
    …ECOs on RTL, synthesized, and post route netlists + Fluent in Verilog RTL coding and ASIC design methodology is a must + Competence in developing design ... timing and logic equivalent checking + Creating documentation targeting design , verification, and test groups + Assisting...communications skills + 8+ years of direct experience in ASIC /IC design with deep knowledge of whole… more
    Renesas (11/09/24)
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  • Senior Digital Design Engineer

    Teledyne (Mountain View, CA)
    …conformity to standards such as MISR-C and customer requirements + Participates in technical design reviews of existing designs and peer reviews + Compiles ... summarizing development and service issues + Advanced level experience with digital and ASIC design + Advanced level experience with RISC or ARM-based… more
    Teledyne (10/10/24)
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  • R&D IC Design Engineer

    Broadcom (San Jose, CA)
    …STA, RTL/gate level simulations & silicon debug + Scripting for various IC design tasks such as STA, equivalency checks, test bench, simulations, synthesis, ... resource requirements & development schedule + generate verification & test plans for design validation + Perform...of 12 years of work experience with direct related technical skill_ + _M.S degree n EE or Computer… more
    Broadcom (11/01/24)
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  • Physical Design Methodology Engineer

    quadric.io, Inc (Burlingame, CA)
    …What We Expect: Initiative, Collaboration, Completion Role As a member of our physical design methodology team you will be tasked with developing physical design ... scripts from RTL to GDS across multiple advanced process nodes. + Preform test chip tape outs as necessitated by architecture innovation. + Collaborate with the… more
    quadric.io, Inc (11/13/24)
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