- Broadcom (San Jose, CA)
- …We are seeking for an experienced RTL Designer for our team. The engineer will be responsible for design & development of digital circuits including defining ... experience is a plus. + Experience in micro-architecture and RTL development. + Worked on architecture definitions on clocks,...in Tcl, Perl, Python scripting + Good understanding of ASIC design flow + Strong interpersonal skills… more
- Capgemini (San Francisco, CA)
- ** RTL Design Engineer ** **Location: San Jose CA...description:** . As an RTL Design Engineer you will be responsible for ASIC designs used ... . Develop micro architectural document from requirements specifications. . Extensive RTL design utilizing Verilog / SystemVerilog . Perform basic… more
- Cisco (San Jose, CA)
- …Bachelor's Degree in EE, CE, or other related field. * 7+ years of related ASIC design verification experience. * Proficient in ASIC verification using ... and review of code and functional coverage. * Ensure RTL quality with qualifying the design with...design in emulation. * Oversee and manage the ASIC bring-up process. Who You Are The Core Hardware… more
- Qualcomm (San Jose, CA)
- …a smarter, connected future for all. As a Qualcomm Digital ASIC Engineer , you will define, model, design , optimize, verify, validate, implement, and document ... Science, Engineering, or related field and 4+ years of ASIC design , verification, validation, integration, or related...power use, and verification or similarly for custom circuit design /layout flow. * Utilizes tools/applications (eg, RTL … more
- Meta (Menlo Park, CA)
- …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Micro-architecture development 3. RTL development using Verilog, System Verilog and HLS 4.… more
- Capgemini (San Francisco, CA)
- **Physical Design Engineer ** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the physical chip ... development, executing from the inception of the design ( RTL or gate netlist) through the...**Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - ASIC Physical Design … more
- Broadcom (San Jose, CA)
- …already have a Candidate Account, please Sign-In before you apply.** **Job Description:** The ASIC Design Engineer will need to interact internally with the ... aspects including but not limited to physical synthesis, influencing RTL content and coding styles that will lend itself...candidate should have a strong understanding of VLSI and ASIC physical design 20+ years of experience… more
- Meta (Menlo Park, CA)
- …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration. 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Micro-architecture development. 3. RTL development using Verilog, System Verilog and HLS. 4.… more
- Meta (Menlo Park, CA)
- …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Micro-architecture development 3. RTL development using Verilog, System Verilog and HLS 4.… more
- IBM (San Jose, CA)
- …Professional Expertise + Experience in ASIC or FPGA logic verification. + Strong FPGA/ ASIC RTL logic design skills. + Experience with programming in C, ... technologists to invent what's next for IBM and the world. As a Hardware Engineer intern, you will work with world-class global researchers focused on design … more
- Cisco (San Jose, CA)
- …ASIC Implementation Technical Lead in San Jose, CA with a primary focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design ... integration with the testability features coordinated in the RTL . * Work closely with the design / design -verification and PD teams to enable the integration… more
- Broadcom (San Jose, CA)
- …and coverage metrics from specifications and write block and chip-level tests. ○ Debug RTL and Gate simulations and work with design engineers to verify fixes. ... Charging Chips and other new initiatives. As a verification engineer , your responsibilities will include: ○ Architect block and...specifications and write block and chip-level tests. ○ Debug RTL and Gate simulations and work with design… more
- Cisco (San Jose, CA)
- …/lead to engage in new development of our UCS family. You will have an ASIC design and verification background with hands-on experience in RTL verification ... for ASIC bring up Minimum Qualifications * 8+ years ASIC design verification experience with Bachelor's or Master's degree in equivalent experience. *… more
- Cisco (San Jose, CA)
- …understanding of engineering fundamentals and technical problem-solving skills * Familiarity with ASIC design flow, including RTL (Register Transfer Level) ... Knowledge of EDA (Electronic Design Automation) tools used in the ASIC design process is also beneficial. Why Cisco #WeAreCisco, where each person is unique,… more
- Google (Mountain View, CA)
- …field, or equivalent practical experience. + 5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog ... SystemVerilog. + Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power... code, performance and power as well as low-power design techniques. Preferred qualifications: + Master's degree or PhD… more
- Cisco (San Jose, CA)
- …ASIC Implementation Technical Lead in San Jose, CA with a primary focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design ... activities. What You'll Do You will be part of ASIC physical design Team which is responsible...which is responsible for full Chip physical implementation from RTL to GDSII. As Physical Verification Engineer … more
- Cadence Design Systems, Inc. (San Jose, CA)
- …to their limits. This particular position requires the individual to be part of ASIC Design effort of the next generation emulation processors Job Requirements: ... years of related experience; or Master's + Experience in RTL development of complex ASIC /SoC. + Comfortable...the development of complex logic systems. + Aware of ASIC design flow. Experience with design… more
- Cisco (San Jose, CA)
- …some of the most complex ASICs being developed. Your Impact As a physical design engineer you will be spearheading the implementation of complex multi-hierarchy ... design of an end-to-end IP or integration of ASIC /SoC design . * Design custom...Area). * Experience and knowledge of hardware architecture and RTL /logic design for timing closure, specifically experience… more
- Cisco (San Jose, CA)
- …being developed in the industry. What You'll Do You will participate in the ASIC design verification and Emulation for Cisco high-end switching products. One of ... Who You'll Work With You will work with front-end RTL Design and Verification teams and Architects...work with SDK and Software teams as part of ASIC development to create a flawless handshake between hardware… more
- Broadcom (San Jose, CA)
- …line interfaces and protocols. You will be responsible for the micro-architecture, design , RTL coding, debugging and synthesis of complex functional blocks ... some of the most complex and cutting edge networking ASIC 's and multi-chip solutions to market over the last...switch products. Responsibilities include: . High quality micro-architecture and design specifications . Verilog RTL coding and… more