- Broadcom (San Jose, CA)
- …We are seeking for an experienced RTL Designer for our team. The engineer will be responsible for design & development of digital circuits including defining ... experience is a plus. + Experience in micro-architecture and RTL development. + Worked on architecture definitions on clocks,...in Tcl, Perl, Python scripting + Good understanding of ASIC design flow + Strong interpersonal skills… more
- Capgemini (San Francisco, CA)
- ** RTL Design Engineer ** **Location: San Jose CA...description:** . As an RTL Design Engineer you will be responsible for ASIC designs used ... . Develop micro architectural document from requirements specifications. . Extensive RTL design utilizing Verilog / SystemVerilog . Perform basic… more
- Cisco (San Jose, CA)
- …Bachelor's Degree in EE, CE, or other related field. * 7+ years of related ASIC design verification experience. * Proficient in ASIC verification using ... and review of code and functional coverage. * Ensure RTL quality with qualifying the design with...design in emulation. * Oversee and manage the ASIC bring-up process. Who You Are The Core Hardware… more
- Qualcomm (San Jose, CA)
- …a smarter, connected future for all. As a Qualcomm Digital ASIC Engineer , you will define, model, design , optimize, verify, validate, implement, and document ... Science, Engineering, or related field and 4+ years of ASIC design , verification, validation, integration, or related...power use, and verification or similarly for custom circuit design /layout flow. * Utilizes tools/applications (eg, RTL … more
- Google (Mountain View, CA)
- …field, or equivalent practical experience. + 3 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog ... SystemVerilog. + Experience with logic synthesis techniques to improve RTL code, performance and power as well as low-power... code, performance and power as well as low-power design techniques. + Experience with ARM-based SoCs, interconnects and… more
- Meta (Menlo Park, CA)
- …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Micro-architecture development 3. RTL development using Verilog, System Verilog and HLS 4.… more
- Cisco (San Jose, CA)
- …the lab. Who You'll Work With You will work with exceptional talent with vast ASIC design and development expertise. With Cisco being a systems company, you will ... or Master's degree in Electrical or Computer engineering. * 8+ years of ASIC Design experience. * Excellent Verilog/System Verilog programming skills. *… more
- Cisco (San Jose, CA)
- …the lab. Who You'll Work With You will work with exceptional talent with vast ASIC design and development expertise. With Cisco being a systems company, you will ... * Bachelor's degree in Electrical or Computer engineering. * 4+ years of ASIC Design experience. * Excellent Verilog/System Verilog programming skills. *… more
- Capgemini (San Francisco, CA)
- **Physical Design Engineer ** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the physical chip ... development, executing from the inception of the design ( RTL or gate netlist) through the...**Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - ASIC Physical Design … more
- Meta (Menlo Park, CA)
- …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration. 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Micro-architecture development. 3. RTL development using Verilog, System Verilog and HLS. 4.… more
- Cisco (San Jose, CA)
- …in Electrical Engineering, Computer Science or related degree with 5+ years of ASIC design experience or Masters degree in Electrical Engineering, Computer ... and test plan reviews. * Architect and implement complex RTL designs. * Scope third party IP requirements and...Science or related degree with 3+ years of ASIC design experience * Experience in Verilog/System… more
- Meta (Menlo Park, CA)
- …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Micro-architecture development 3. RTL development using Verilog, System Verilog and HLS 4.… more
- Google (Mountain View, CA)
- …video codecs, display, computer cores and machine learning accelerators). + Experience in ASIC development methodology and require Verilog RTL development as per ... more about benefits at Google (https://careers.google.com/benefits/) . + Develop system verilog RTL to implement reasoning for ASIC or SoC products according… more
- Cisco (San Jose, CA)
- …ASIC Implementation Technical Lead in San Jose, CA with a primary focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design ... integration with the testability features coordinated in the RTL . * Work closely with the design / design -verification and PD teams to enable the integration… more
- Cisco (San Jose, CA)
- … ASIC team can provide. You will work with exceptional talent with vast ASIC design and development expertise. With Cisco being a systems company, you will ... first customer shipments Your Impact You are a diligent Design /SDC Engineer with strong analytical skills and...timing modes. * Option to also do block level RTL design or block or top-level IP… more
- Cisco (San Jose, CA)
- …and be responsible for ASIC bring up Minimum Qualifications: * 7+ years ASIC design verification experience with a bachelor's or master's degree * Prior ... hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various… more
- Cisco (San Jose, CA)
- …/lead to engage in new development of our UCS family. You will have an ASIC design and verification background with hands-on experience in RTL verification ... for ASIC bring up Minimum Qualifications * 8+ years ASIC design verification experience with Bachelor's or Master's degree in equivalent experience. *… more
- Cisco (San Jose, CA)
- …* Bachelor's degree in Electrical or Computer engineering and 15+ years of ASIC Design experience. * Experience with Verilog and System Verilog programming. ... Master's degree in Electrical or Computer engineering and 12+ years of ASIC Design experience. * Experience in Data center/Hyperscaler/AI Networking… more
- Cisco (San Jose, CA)
- …most complex ASICs being developed in the industry. You will work with front-end RTL Design and Verification teams and Architects to understand chip architecture ... in deployment-mode applications. Your Impact You will participate in the ASIC design verification for Cisco high-end switching Products, one of the largest and… more
- Broadcom (San Jose, CA)
- …applications. We are seeking a staff **Digital Front-End Designer** with deep expertise in RTL design , synthesis, and design optimization to drive the ... coding, micro-architecture, and PPA trade-offs to optimize performance, power, and area. ** RTL Design and Micro-Architecture:** + Develop high-quality RTL … more